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Re: Zip Information
David Empson (dempson@atlantis.actrix.gen.nz) wrote:
[...]
: J4 has a default track connected between pins 1 and 2. Pin 2 goes to
: the ASIC. Pin 1 goes to the IRQ signal on the 65816 and on the CPU
: plug. Pin 3 goes to the NMI signal on the 65816 and on the CPU plug.
: The jumper appears to be for selecting between one of these
: interrupts, but I don't know what the ASIC would need this for.
Okay, this would appear to confirm the other information I have
as to the functions of J3 and J4.
: > J1 and J5 are processor connectors, J's 6-8 are for the
: > Split cache modification, but I know nothing about the function of J3
: > and J4. Furthermore, where is J2?
: The slot connector.
Oops, I see it now. :)
--
Jawaid Bazyar | Like UNIX? Like your Apple IIGS? Then ask
Procyon, Inc. | me about GNO/ME for the Apple IIgs!
bazyar@hypermall.com | P.O Box 620334 (Sequential: 303-666-4549)
--The Future is Now!-- | Littleton, CO 80162-0334 (303) 781-3273
--
Jawaid Bazyar | Like UNIX? Like your Apple IIGS? Then ask
Procyon, Inc. | me about GNO/ME for the Apple IIgs!
bazyar@hypermall.com | P.O Box 620334 (Sequential: 303-666-4549)
--The Future is Now!-- | Littleton, CO 80162-0334 (303) 781-3273