[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: II+ reset vector?



As correctly stated in the previous thread, the hardware reset vector is
at $FFFC-FFFD
which contains the RESET routine address at $FA62.  Near the end of the
$FA62 RESET
routine, an indirect jump is made to SOFTEV at $3F2-$3F3, as long as a
certain condition
is met.  This condition is that the byte at $3F4 must equal the value of
the High Order
address byte at $3F3 EOR'ed with the value #$A6.  If not, the computer
will do a
cold reset and restart the computer.

So in other words, a CONTROL-RESET can be trapped so that you can direct
the CONTROL-
RESET to your own Reset subroutine.  You just store your Machine Language
RESET
subroutine address at $3F2-$3F3, with the low order byte first.  Ex. -
Your routine is
located at $300, so you would store #$00 at $3F3, and a #$03 at $3F3. 
Then EOR the
value at $3F3 with the value of #$A6, and store _that_ value at $3F4.

The routine SETPWRC at $FB6F will automatically do the last step for you.

Art...
netcoking@aol.com