Senior Prom logic

[EricN <eric@neilsonhart.com>]

Has anyone reversed engineered the Senior Prom logic?.  I'm planning
on building a board.  From the one photograph I can find, it looks
like they used a single 74LS00 quad 2-input NAND gate chip, which
seems odd since the Senior Prom docs claim debouncing functionality.
It seems to me like you would need the 74LS00 and a S-R flip flop chip
to do the logic plus debouncing.

Here are the Senior Prom states:

Switch looks to be SPDT with common open:
Position 1: Normal Apple ROM code active
Position 2 (middle): Normal Apple ROM code active until you press the
NMI interrupt, then Sr. Prom code is activated and NMI is generated
Position 3; Senior Prom code active

I know you can do an S-R flip flop with two NAND gates but the truth
table I worked out seems to need four or five NAND gates just to
handle the logic.

Truth table I created is here for reference:

Inputs:
Momentary contact switch = M
Senior Prom signal = S
Normal Apple signal = A

Outputs:
N = NMI
E = EPROM signal that toggles A13 high or low

M  P  A    N  E
-----------    -------
0   0   0     1  0
0   0   1     1  0
0   1   0     1  1
0   1   1     x   x
1   0   0     0   1
1   0   1     1   0
1   1   0     0   1
1   1   1     x   x

Thanks,
Eric