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Re: Is it possilble to use timer interrupt in Apple II?
"bluebird" <mildstorm@gmail.com> wrote in message
8407bfa8-a4b6-4838-a8f2-1135b1b459d4@r24g2000prf.googlegroups.com">news:8407bfa8-a4b6-4838-a8f2-1135b1b459d4@r24g2000prf.googlegroups.com...
> Dear Albert,
>
> I tried to make Super Serial Card communication with PC.
> At first, I implemented it with status machine method which checks SSC
> status and tx/rx the data.
> The method I applied is the same with what you talked to me.
> => There is no execution blocking while sending/receiving.
>
> But I thought it will be more simple with interrupt handling.
> I don't know whether SSC generates interrupt in relation with RX/TX.
> => Currently, I am going to try it with BRK interrupt.
> (Actually, I am novice in Apple II S/W, H/W)
>
> ------------------------------------------------------
> I wanted to know whether setting timer interrupt is possible not.
> If setting timer interrupt is not possible, making RTOS(which is
> preemptive as you know) is impossible.
>
> Thanks for your kind explanation again.
Thank you very kindly right back.
To be 100% fair, you were asking more about threading then
actual preemptive multi-tasking anyway. If you wanted to dig in
your heals you could state that multi-tasking and that of
threading ability are not the same question!
However, now that you mentioned the SSC?
Hum, my recollection is that card DOES generate an interrupts.
The SSC could work two ways to control character flow to
a printer or modem. The card would send out a ctrl-s, or
a ctrl-q for software flow. It also supported hardware
(one pin high, or low (off/on) to allow flow of data.
(you mention the tx/rx pins in your post).
However, the card ALSO did support an hardware interrupts
if turned on. This was/is preemptive over the os.
So, while the keyboard and good many things on the Apple hardware
does not generate an hardware interrupts, the SSC card was able to
generate a hardware interrupt. It is a switch setting on the card
and if turned on, a Jump (JMP) instruction to a particular memory
location (based on the slot #) would in fact occur.
I don't have any docs in front me, and it been MANY years.
I would strongly suggest you start another question here and ask
if the SSC supports hardware interrupts. My memory says
almost for certain it does...
--
Albert D. Kallal
Edmonton, Alberta Canada
pleaseNOOSpamKallal@msn.com