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Re: Apple II SRAM card

Subject: Re: Apple II SRAM card
From: David Wilson <mcs6502@gmail.com>
Date: Mon, 11 May 2009 01:16:49 -0700 (PDT)
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128KB is easily available in a single byte wide DIP IC as is 512KB.

Inputs to the glue logic are R/W, A0..3, DEVSEL', A12-15 [10]
Outputs/state signals are A14-A18, BANK1, RDEN, WREN, PREWR,
ENABLE' [10]

Hmm, might be a tight squeeze for a GAL so a small CPLD may be better.
Alternatively a GAL and MSI (74xxx) latch would only bring it up to 4
chips (unless the address bus needs buffering as well?).

The Apple language card was designed for slot 0 so does not implement
any logic to allow multiple cards to share the INHIBIT line... does
the Saturn 128KB card do so?

Follow-Ups:
- Re: Apple II SRAM card
  - From: mdj <mdj.mdj@gmail.com>

References:
- Apple II SRAM card
  - From: srkh28@gmail.com
- Re: Apple II SRAM card
  - From: A2Aviator <a2aviator@gmail.com>
- Re: Apple II SRAM card
  - From: Alex Freed <alex_news@mirrow.com>
- Re: Apple II SRAM card
  - From: PZ <skierpaul@yahoo.com>
- Re: Apple II SRAM card
  - From: "Michael J. Mahon" <mjmahon@aol.com>

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