Re: Not your father's Applicard

[alex.freed.007@gmail.com]

On Jan 10, 2:47 am, "Michael J. Mahon" <mjma...@aol.com> wrote:
>
> If the Apple could dynamically reconfigure the FPGA card, it would
> make it truly a different substance.

It just might be possible to add wings to this particular pig...

>
> The practical issues of configuration file size and programming speed
> are, of course, of real importance.  I was about to ask what a typical
> file size is...

Always fixed size for a particular chip. For the 500E on my prototype
the configuration file is 278K.

> And how many bits must be banged per "bit" of config?

After some initial setup, JTAG is like SPI. 2 bytes to send for each
bit -
clock up and clock down with the data bit set or reset.

> And are there real-time constraints--for example, can the programming
> be "paused" and resumed after a disk I/O?

You can send one clock an hour - no limitation AFAIK.

>
> Config files up to a megabyte are certainly supportable with CFs and
> other "hard disks", but just how much config state is there, really?

Google is your friend. Lots of info on JTAG.

> (I thought all this used to go into a nearby ROM.  ;-)

Exactly. A tiny serial EEPROM usually used to load it at
power-up with say 50 MHz clock.

-Alex.