Re: cc65 competition?

[BruceMcF <agila61@netscape.net>]

On Apr 19, 2:32 am, "Michael J. Mahon" <mjma...@aol.com> wrote:
> For a 6502, zero page *is* the "registers".  Nothing of interest to
> a compiler--like pointers or integers--will fit in the processor's
> registers.

Yes, but at the same time, much of low level interfacing with the
Kernal
from C involves treating zero page locations as either a global
integer
variable or global pointer variable.

I took it that he was referring to that kind of use of the zero
page ...
the zero page *used as* memory that is quicker to get to and quicker
to use when dereferencing a pointer.

> Using a 256-byte stack for both return addresses and parameters is
> really pushing it.

Yeah, I can see a pointer to a software stack structure passed on
the hardware stack before making the 6502 call.

With that, you only use the TSX register one time, at the start of
a called function, to set up the local variable pointer in the zp,
and possibly at the end if that slot in the hardware stack is used,
for ANSI C returns, as the pointer to the return value, or for K&R
returns, for the return value itself. So X would be free during
the routine, but Y would be in heavy use.

The general point stands ... without the built in stack frame address
modes of the 65816, there's going to be one of the two index
registers
that is in use to reference local variables.

> And an option for inlining small functions can also be a big winner,
> and a very effective time-space tradeoff.

Yes, I overlooked this entirely, but but there are a lot of
optimizations available for a zp routine that are not available
outside the zp.