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"NoSSC" Bitbanging serial port for the Apple ][

I was asked by a friend to get him a SSC or something similar. Though
I don't have another SSC and I didn't want to give him mine, I wrote a
bitbanging driver using the Game I/O connector.
I think it might be interesting for others too, so I post the source
code here.
It might also be useful for booting "from bare metal" without a SSC,
beause the read routine is only $3E bytes long. With flow control, it
should also reach a higher speed than the normal SSC method without
flow control.
There are some things left to do: Add flow control (at least on the
input side) and put it into ADT.
This is the source code (to be viewed in fixed charachter spaing):
<PRE>
               1000 * * * * * * * * * * * * * * * * * * *
               1010 *                                   *
               1020 *              NoSSC                *
               1030 *                                   *
               1040 * Serial interface for the Apple ][ *
               1050 * using the joystick port           *
               1060 *                                   *
               1070 * (C) Ferdinand Meyer-Hermann 2007  *
               1080 * * * * * * * * * * * * * * * * * * *
               1090 * Joystick port addresses           *
               1100 * * * * * * * * * * * * * * * * * * *
               1110        .OR $300
C058-          1120 SET0   .EQ $C058
C059-          1130 SET1   .EQ $C059
C061-          1140 IN     .EQ $C061
               1150 * * * * * * * * * * * * * * * * * * *
               1160 * Delay table                       *
               1170 * Baudrate WDEL                     *
               1180 * 1200     A5   55   A5             *
               1190 * 2400     50   28   50             *
               1200 * 4800     26   13   26             *
               1210 * 9600     11   09   11             *
               1220 * 19200    06   03   06             *
               1230 * 38400    01                       *
               1240 * * * * * * * * * * * * * * * * * * *
0300- 11       1250 WDELAY .DA #$11
0301- 07       1260 BITS   .DA #$07
               1270 * * * * * * * * * * * * * * * * * * *
               1280 * Save area for X and Y reg         *
               1290 * * * * * * * * * * * * * * * * * * *
0302-          1300 X      .BS 1
0303-          1310 Y      .BS 1
0304-          1320 DATA   .BS 1
               1330 * * * * * * * * * * * * * * * * * * *
               1340 * Send a byte                       *
               1350 * * * * * * * * * * * * * * * * * * *
               1360 SEND.BYTE
0305- 8E 02 03 1370        STX X
0308- 8C 03 03 1380        STY Y
030B- AC 01 03 1390        LDY BITS
030E- C8       1400        INY
030F- 4C 1A 03 1410        JMP .2
0312- 6A       1420 .1     ROR
0313- 90 05    1430        BCC .2       Output a logical 0 i.e.
positive level
0315- 8D 58 C0 1440        STA SET0     Output a logical 1 i.e.
negative level
0318- B0 04    1450        BCS .3       Always
031A- 8D 59 C0 1460 .2     STA SET1
031D- EA       1470        NOP          Padding for timing reasons
031E- AE 00 03 1480 .3     LDX WDELAY
0321- CA       1490 .4     DEX
0322- D0 FD    1500        BNE .4
0324- 88       1510        DEY
0325- D0 EB    1520        BNE .1
0327- 8D 58 C0 1530        STA SET0     Output the stop bit but don`t
delay.
032A- AE 02 03 1540        LDX X
032D- AC 03 03 1550        LDY Y
0330- 60       1560        RTS          Fetching the next data byte
will take long enough
               1570 * * * * * * * * * * * * * * * * * * * * *
               1580 * Recieve data                          *
               1590 * * * * * * * * * * * * * * * * * * * * *
               1600 RECV.BYTE
0331- 8E 02 03 1610        STX X
0334- 8C 03 03 1620        STY Y
0337- A0 00    1630        LDY #$00
0339- AD 00 03 1640        LDA WDELAY
033C- 4A       1650        LSR
033D- AA       1660        TAX
033E- AD 61 C0 1670 .1     LDA IN
0341- 10 FB    1680        BPL .1       Wait for start bit
0343- CA       1690 .2     DEX
0344- D0 FD    1700        BNE .2
0346- AE 00 03 1710 .3     LDX WDELAY   Delay for a bit period
0349- CA       1720 .4     DEX
034A- D0 FD    1730        BNE .4
034C- AD 61 C0 1740        LDA IN
034F- 49 FF    1750        EOR #$FF     Data line is inverted
0351- 2A       1760        ROL          High bit into carry
0352- 6E 04 03 1770        ROR DATA     And into data
0355- C8       1780        INY
0356- CC 01 03 1790        CPY BITS
0359- D0 EB    1800        BNE .3       Do next bit
035B- C0 08    1810 .5     CPY #8
035D- F0 06    1820        BEQ .6
035F- 6E 04 03 1830        ROR DATA
0362- C8       1840        INY
0363- D0 F6    1850        BNE .5       Always
0365- AD 04 03 1860 .6     LDA DATA
0368- AE 02 03 1870        LDX X
036B- AC 03 03 1880        LDY Y
036E- 60       1890        RTS
               1900 * * * * * * * * * * * * * * * * * * * * *
               1910 * Make Dos KSW and CSW point to NoSSC   *
               1920 * * * * * * * * * * * * * * * * * * * * *
               1930 ENABLE.TERMINAL
036F- A9 05    1940        LDA #SEND.BYTE
0371- 8D 53 AA 1950        STA $AA53
0374- A9 03    1960        LDA /SEND.BYTE
0376- 8D 54 AA 1970        STA $AA54
0379- A9 31    1980        LDA #RECV.BYTE
037B- 8D 55 AA 1990        STA $AA55
037E- A9 03    2000        LDA /RECV.BYTE
0380- 8D 56 AA 2010        STA $AA56
0383- 60       2020        RTS


SYMBOL TABLE

    0301- BITS
    0304- DATA
    036F- ENABLE.TERMINAL
    C061- IN
    0331- RECV.BYTE
          .01=033E  .02=0343  .03=0346  .04=0349  .05=035B  .06=0365
    0305- SEND.BYTE
          .01=0312  .02=031A  .03=031E  .04=0321
    C058- SET0
    C059- SET1
    0300- WDELAY
    0302- X
    0303- Y

0000 ERRORS IN ASSEMBLY
</PRE>