Re: IIGS tech questions...

[dempson@actrix.gen.nz (David Empson)]

RedskullDC <redskulldc@oohay.moc.ua> wrote:

> I've scoured the IIGS tech manuals for any information on these
> 2 topics, but none of them seem to go into the detail I was hoping for.
> 
> Can anyone help with these before I resort to the logic analyzer?
> 
> 1. In superhires modes (either 320 or 640x200) when *exactly* does the
> video hardware re-read the SCB/palette information for each line about to be
> displayed, and in what order?
> 
> The SCB for the line to be displayed would have to be read first to
> ascertain exactly which colour palette has to be loaded, and also whether
> an interrupt has to be generated for the line in question.
> 
> Does the video hardware buffer the pallette bytes before the line is
> displayed, (implying that the pallette for the line to be displayed is
> fixed) or does it do a read of screen data, then another read of the
> pallette on the fly (allowing pallette changes mid-line)?

It definitely doesn't read it mid-line. There is a fair amount of
software which changes the palette or border colour on a line-by-line
basis, and it is limited to 16 colours per scan line.

I can't tell you whether the hardware reads the SCB at the beginning of
the scan line or just after the previous one, but it is somewhere within
the horizontal blanking period. I think it also reads the palette data
during the horizontal blanking, so in principle you can have a different
16-colour palette for all 200 lines, even though there are only 16
palettes available.

> I'm guessing that it reads the SCB then palette data on the negative
> transition of the Horiz sync pulse, though it could be anywhere in the
> front/back porch, horiz sync area.

That seems to agree with observations.

> 2. Do the read/write main/alt softswitches only affect bank 00, or
> do they affect all even numbered RAM banks? (except E0/E1)

Under normal configuration, no they do not. Banks $02 through $7F are
always linear and unaffected by the IIe compatibility softswitches.

There is an additional softswitch which modifies the memory map in the
"fast" banks, to enable the $Cxxx I/O window and the language card. I
don't have documentation handy so I can't look up the specifics, but I
think it was bit 0 of $C029, or perhaps something in $C035 or $C036.

That particular softswitch is NOT supported by any standard system
software. Things break very badly if you modify this softswitch.

That same softswitch might cause all even banks to also obey the
auxiliary memory softswitches to give access to the adjacent odd bank.

I recall that $C029 (NEWVIDEO) has to be modified using
read-modify-write, specifically so you don't change the state of bit 0
(it is normally set). If you clear it, the system will usually crash.

> For instance, if I have readALT turned on, and I read $02/1000,
> will I get the contents of $03/1000?

That certainly isn't normal behaviour.

-- 
David Empson
dempson@actrix.gen.nz