On May 25, 11:47 am, "Michael J. Mahon" <mjma...@aol.com> wrote:
biel...@terra.es wrote:
On May 25, 3:37 am, "Michael J. Mahon" <mjma...@aol.com> wrote:
Yep... The figures were right after all.
Nope.
YEP :
Non-accelerated rates would be
((6+4+2)*4+3)/4=12.75 cycles/byte -->> 78.43 KB/s (slightly unrolled)
((6+4+2)*2+3)/2=13.50 cycles/byte -->> 74.07 KB/s (non-unrolled)
OK--I wasn't looking at the formulas, just the time deltas we were
talking about--a danger of focusing too much on the details. ;-)
These look OK except for the clock rate being 1.0205MHz and the result
is actually "kB" (1000) rather than "KB" (1024). Since we're comparing
to a 11.025kHz sample rate, the "kB" number is actually handier, so the
clock rate correction gets to 80.04kB/sec for the 4-unrolled loop and
75.59kB/sec for the 2-unrolled loop.
Hmm.. :-)
1020500/12.75/1024 = 78.16 KB/s -->> 4-unrolled loop
1020500/13.50/1024 = 73.82 KB/s -->> 2-unrolled loop
Frankly, these rates are sufficiently high that it's clear something
else is the problem.
These rates are 2x the actual ones seen in the real world.
Either the overhead for each sector takes about as much as the sector-
read code,
or the data is being moved twice...