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Re: Print to SHR
Payton Byrd wrote:
"Michael J. Mahon" <mjmahon@aol.com> wrote in message v4GdnVOhTYkQ7XPYnZ2dnUVZ_vGinZ2d@comcast.com">news:v4GdnVOhTYkQ7XPYnZ2dnUVZ_vGinZ2d@comcast.com...
Payton Byrd wrote:
"Michael J. Mahon" <mjmahon@aol.com> wrote in message ap-dnce4UZBwU3DYnZ2dnUVZ_sCinZ2d@comcast.com">news:ap-dnce4UZBwU3DYnZ2dnUVZ_sCinZ2d@comcast.com...
William Garber wrote:
While Moore's "Law" has pretty much petered out for improvements
of single-thread processor performance
Evidently you haven't seen a Core 2 Duo in action. It's about 40 to 180% faster than the Netburst architecture at the same clock speed per thread.
*At the same clock speed*--but clock speeds are no longer increasing
exponentially--closer to logarithmically. ;-)
Moore's Law has nothing to do with clock speed.
Moore's "Law" was stated in terms of transistor density increases,
but the viability of the "law" depends on translating those density
improvements, at least linearly, into value increases to customers.
In the case of processors, value is throughput per dollar, and for
two decades the industry was able to find ways to translate increased
transistor density into increased throughput per dollars (or cost-
performance).
That translation has fallen very short of linear now for the last
five years, signalling the beginning of a new business regime.
The improvement you quote at the same clock speed is a measure of the
improved efficiency of the microarchitecture, which the netburst
microarchitecture had thrown away to gain marketing megahertz.
You're citing the exact reason why the silicon world refocused on what Moore's Law really means.
No, the "restatement" is a face-saving gesture to cover the fact
that they are no longer able to translate density improvements into
processor value at an economic rate.
Multiple cores do not increase throughput linearly, and for most
applications, they do not increase throughput at all.
Until most applications are well-designed to efficiently utilize
two, four, or eight processors to reduce their time-to-solution,
the market will not realize much value from multicore chips (as
virtually every user application-weighted benchmark shows).
We became so accustomed to the silicon gurus improving single-threaded
application performance that we never stepped up to the challenge of
learning to use symmetric multiprocessing to achieve application
speedups in most user applications. Now that single-threaded
performance is stagnating, it's time to pay the piper.
(BTW, the *big* numbers, like 180% are a case of either very
specialized loopy code or cases where the working set of the code
now fits in the 4MB cache, when it didn't before. The sustained
throughput improvements due to microarchitecture are more in the
30%-40% range.)
The improvements in manufacturing which come through Moore's Law are the reason you can put 4MB of cache on a CPU. You are citing exactly why Moore's Law is alive and well.
The value of memory is primarily its capacity, which increases linearly
with density. Moore's "Law" works fine for memory (as long as the need
for it isn't saturated).
But adding cache to a processor does not increase its throughput in a
linear fashion. The performance increase from increasing cache size is
a sublinear function. At the current multi-megabyte cache sizes, the
incremental improvement from doubling cache size is minor for almost
all applications. That low-hanging fruit is already picked.
(Of course, as the number of cores sharing a cache increases, the amount
of shared cache must increase just to maintain comparable hit rates, so
the ratio of cache to processors is the more interesting figure.)
Many other microarchitectures, AMD and PowerPC among them, had achieved
the Core 2 efficiency several years ago--this is just a case of Intel
finally getting the word.
No, Core 2 is way beyond the efficiency level of Athlon, go read the real-world benchmarks <http://www.tomshardware.com>. PowerPC has never been at the processing efficiency of the Intel processors. Just because PowerPC can run X instructions compared to Y instructions on Intel is irrelevant when a job requires 300X for every 50Y. RISC is dying, at least in the high-performance market. Sun is keeping it alive through massive parallelism, but as Intel and AMD catches up to the levels of Parallelism used by Niagara, RISC will become more and more marginalized. From a pure efficiency standpoint nothing is even close to Itanium in per-thread performance and Intel is hell-bent on getting that performance into X86-64.
You need to take a look at the microarchitectures of all these
processors. You will see that the processors for more CISC-like
instruction sets are actually "compiling" them on the fly into
RISC-like instructions that are actually implemented in logic.
Certainly, one thing that a surfeit of transistors has done is make
it feasible to get most of the RISC benefits while retaining a CISC
instruction set. A RISC designer would call that a waste of good
transistors, but compatibility is also a value.
For this to be a part of a Moore's "Law"-like advance, there must be
a succession of "encores" to this microarchitecture improvement that
continue to deliver more performance at the (slowly increasing) clock
speed. Don't count on that--particularly from Intel.
You're sounding very biased against Intel and unrealistic about both Moore's Law and Intel's products. Moore's Law has nothing to do with increasing clock speed, and everything to do with enabling more powerful CPU's through better utilization of the space provided in a relatively-sized slice of semiconductor. If you don't think that Intel's not doing a great job of pushing the envelope then you aren't paying attention. Right now they're spanking everyone else in the CPU industry through sheer engineering prowess. I challenge you to find any PC that can outrun a 2.8 GHZ Core 2 Duo, even in a single threaded application. The only chance would be to take an Athlon FX-62 and put it under extreme nitrogen cooling to over clock it to about 4.5 ghz.
I haven't paid as much attention to Intel's microarchitectures recently,
but they clearly were breathing their own exhaust when they built *very*
long pipelines to keep raising the clock frequency. As they raised the
frequency, they increased the CPI (cycles per instruction) so that very
little throughtput improvement resulted from all the increased logic
complexity.
The Pentium M chips never went for maximum megahertz, but instead tried
to maximize performance by minimizing CPI--thus saving both logic and
power.
As the Core series demonstrates, the Pentium M team's philosophy won,
and since then, Intel doesn't talk much about megahertz (a good thing).
Since Intel is ahead of everyone on process technology at this point,
it's not a good time to compare apples to apples.
The "success components" for a microprocessor vendor are:
1) Silicon process design
2) Silicon manufacturing
3) Microarchitecture design
4) Microarchitecture implementation
5) Instruction set architecture design
I'd rank Intel as tops in the world in silicon manufacturing, and in
the top three in silicon process design. I think they are about average
in microarchitecture design and implementation and below average on
instruction set design--but then that's nailed down on three edges.
I think that *they* think that they are the best in all areas (except
that they chafe a bit on their instruction set). That makes them
vulnerable to the likes of little AMD--but mass usually beats out
maneuverability. ;-)
the hard disk guys continue
to out-run Moore with density and speed improvements.
Moore's Law just says that every 24 months the size of transisters will be halved. This has held true and continues to hold true. Performance does not scale directly with feature size because the interconnects between the features is already a minimal portion of the time it takes the electrons to move around the CPU. Also, Intel's 45nm process uses some new materials that they say will be good down to 15nm. Below that you're into nanotechnology and the carbon nanotube industry is already churning out usable chips for tech samples and there are even quantum computing systems starting to come online through carbon nanotube technology. No, Moore's law isn't slowing down at all, it's actually accelerating considering the recent advances in nanotechnology.
But from the mid-1980s to 2000, that increase in density was directly
translated into performance doubling, about half of it directly from
clock speed improvement (smaller transistors) and half of it from
increased single-thread parallelism (more transistors).
Now, we've reached the practical limit for rapid improvements in
either one of these. Power limitations prevent large processor chips
from significantly increasing their clock speeds, and we've about
emptied the well of improvements in single-thread parallelism,
so more transistors doesn't deliver much more sequential performance.
The first paragraph represents possible outcomes of the application of Moore's Law. The second paragraph represents a biased and uninformed opinion of the current state of the application of Moore's Law. Moore's Law is still going strong and working just the way Gordon Moore predicted. What's different is that the manufacturers are applying it to allow new techniques and technologies that weren't feasible in the 80's and 90's. You're statement about single-threaded parallelism is wrong; there's still lots of headroom for single-threaded performance. Core 2 is a much better single-threaded CPU than anything else. It can also handle clock speeds above 4 Ghz with stock coolers. The limiting reagent is memory as the memory clock has to be increased proportionally with the CPU speed or you need more cache. When 45nm products hit the stores this year you'll see another round of bigger caches per core and thus more single-threaded performance with the current memory techn
ology. If you want to know what's really holding back performance, it's not physics. Go do some research on what has happened to Rambus when they tried to put faster memory into the market. The memory mafia went to work with their price fixing and has set the entire industry back 10 years on that front.
Good--but that fact is no longer seen by its users as delivering
value. The primary driver for replacing machines these days is
a new OS release, not increased utility because of performance.
And I really was talking primarily about the failure to scale
processor performance, since that's the driver for just about
everything else in the digital world. If you choose to "exempt"
that failure from Moore's "Law", then you have been missing why
it was that all those people bought all those computers in the
first place.
The only way to exploit more transistors now is with larger caches
(diminishing returns) and more cores (plays to our weakness in
designing, programming, debugging, and scaling parallel programs).
Whether or not we have a weakness in programming and debugging parallel systems doesn't mean that Moore's Law is running out of steam. It means that we haven't put the time, energy, and money into education the last 50 years to keep up with technology.
But Moore's "Law" is *exactly* about investing in (or stimulating
investment in) *all* the areas required to maintain a high market
growth rate--high enough to create enough profit to maintain the
transistor density growth rate.
If rapidly increasing value is not delivered to the customer, then
the business model enshrined in Moore's "Law" is not sustained.
A decade ago, I tried fervently to call attention to the need to
invest in parallel programming if we wanted the "doubles every year
or two" lifestyle to continue. Predictably, the call was ignored,
as it has always been.
To be fair, it *is* a world-class problem, but we should have started
on it earlier so that we could continue to deliver the throughtput
growth that we all became accustomed to. Instead, we put all of our
effort into single-thread parallelism (the kind that you can't see
through the instruction set), knowing that that well would run dry.
Silicon chips are *already* nanotechnology, and quantum computing
is still a lab curiosity--and will remain so for at least another
decade. Look at how long it takes a lab technology to show up in
shippable products.
The current accepted standard for nanotechnology is products with features less than 10nm. It won't be until after the 15nm generation that we officially get into that territory. I believe Intel's (and IBM/AMD as well) roadmap puts us there in 6 years... right on schedule according to Moore's Law.
At 10nm, features are 100 atoms across. Already, gate thicknesses in
Intel's 45nm HK+MG transistor structures are about 10 atoms thick.
The problem at these scaling levels is tunnelling, which causes
leakage current to increase exponentially with reduced thickness.
Although I expect plenty of innovation still to come, and transistors
to continue to shrink, the end of the bulk transistoris clearly in
sight. And the beginning of production of the single-electron switch
is still many years away.
I'm not saying that it isn't possible to build better things--of
course it is--but the time and capital to do it is *very* large,
and it isn't at all clear how that investment is going to be
financed ten years from now by selling what have *already* become
commodity chips.
The investment does continue to increase, but the end product continually gets cheaper. This is yet another function of Moore's Law and has been since day one.
So you must sell more widgets to keep profits increasing to fund
the higher capital costs of new processes...
The industry model is currently unstable.
I disagree. We've lost DEC and Motorola as major CPU companies, but we've gained AMD and Fujitsu. The industry is stable, it's a few of the companies that are changing. This happens in even the most stable economies. The fact that there is change is sign of a very healthy market.
I have no problem with change--I agree that it's healthy. What I
question is whether the go-go model of the semiconductor industry
enshrined in Moore's "Law" can survive the low margins and slow
volume growth that characterize a commodity market.
Finding the "next big thing" would help...I doubt that it's the
PC industry any longer.
The silicon run was good while it lasted, but we're having to
work hard for the last order of magnitude these days. As the
rate of improvement slows and the required capital investment
soars, the whole "wait 'til next year if you can't afford it"
mentality is due for a sea change.
Sorry, I just don't see this. The reality of the market is much different. AMD/IBM has managed to accelerate their product process generations because of materials advances and will have 45nm products in production on store shelves less than 2 years after their introduction of 65nm products.
There's always a lot of activity just before the bottom falls out. ;-)
The question to ask is what is the "time to profit" on those
huge fab investments, and how many can the planet support, and
could we do with only a couple "bleeding edge" fabs and a lot
more parent and grandparent fabs?
I agree that the silicon technologists are finding ways to keep
the density increasing, but the price for each doubling of density
is also doubling, and we don't have the knowledge to translate
those higher densities into higher throughput on things that
customers care about enough to buy them. That's the problem.
I don't understand the argument. I care about having fast, mutli-threaded systems that don't make me feeling like I'm wading through a marsh pit when I click an icon. The market is filling this need with aplomb. I've been using dual-processor machines since 1997 for my desktop because of the advantages. Now I use dual-core machines and enjoy the reduction in complexity, cost, noise, and heat that the current generation provides. Even two of my laptops are dual-core and they get better battery life and produce less heat than my single-core laptop from the previous chip generation.
Sure, because they are lower-power chips. Lower power is the new
value to the customer. "Throughput per Watt" is a more compelling
metric today, since we have more than enough performance for most
tasks (video compression aside).
So you're hoping that the number of (useful) things that you are
doing on your machine will increase fast enough to use four-, then
eight-core processors?
Lots of independent processor-hog processes is a fine "embarrassingly
parallel" way to use multiple processors, but I know that the
applications I run most do not require multiple processes of sustained
activity. Good for you if yours do.
My machine spends most of its time idling, waiting for me to click
or type something! Then, when I do, it initiates a single threaded
computation that, sometimes, takes a bothersome time to complete.
I don't think I'm unusual.
Remember when it was exciting to see the succession of new chip
generations and the new applications that they enabled? Notice
how long it's been since that was the case?
I'm more excited about processors now than I ever have been. Multi-core and multi-threaded is a far better computing model than single-threaded. We do not live in a single-threaded world or universe. If we ignore this we set ourselves up for absolutely failure.
Bingo. And we *have* ignored it.
Less than one programmer in a hundred understands the consequences
of nondeterminism introduced by threads and how to avoid or control
them. And those things only go to the issue of correctness.
Even fewer understand the recursive, fractal nature of a good
parallel decomposition of a problem that leads to good time-to-
solution (major threads balanced). The data sharing protocols
required and their (provably correct) synchronization rules are
seldom appreciated until the inevitable failures occur.
Parallel computing is an "undiscovered country" because we have
left it so pitiably unexplored for so long.
It is, indeed, an exciting time to be an explorer, though.
BTW, I'm glad that you're excited--excitement is a necessary component
of achievement, and we need *lots* of that.
But if you check in on the man in the street, who actually buys
this stuff to pay for all the advances, *he's* much more excited
about his new digital camera (also approaching saturation) and
his iPod (also now a "replacement" market) than about his computer.
He's probably most excited about his new flat-screen LCD HDTV--
which is where a lot of transistors will go for the next decade,
but most of them in pretty specialized chips.
If it weren't for massive consolidation and the cost reductions
that come from economies of scale, things would be even dryer in
silicon valley.
This is actually a function of Moore's Law. This is also what killed Commodore as they didn't invest into MOS Technologies as they should have then they got left behind. At the end they were depending on a 12 year old computer with a 20 year old CPU that was still manufactured as if it were 1982 all over again.
Exactly. Moore's "Law" is a virtuous economic cycle, and if you
don't keep the pump primed, it stops pumping. The pump is running
a lot slower these days, and there are lots of bubbles inside...
If it doesn't get a lot better soon, it will get worse.
I really don't see the problem. I honestly get the feeling that your favorite CPU (PowerPC?) is loosing economically and thus you think the industry is broken. It's not broken, it's working exactly as it's supposed to.
No, my favorite CPU is the 6502, so I don't worry too much about it. ;-)
And I also agree that the market is working fine. I just see that
the consequences of that market are that the high-flying semiconductor
industry is likely to become about as exciting as making corn flakes.
I hope not, but where's the "next big thing" that created new markets
in the past?
-michael
NadaNet networking for Apple II computers!
Home page: http://members.aol.com/MJMahon/
"The wastebasket is our most important design
tool--and it's seriously underused."