Re: IIgs video modes...

[dempson@actrix.gen.nz (David Empson)]

jsnospam@cimmeri.com <js@cimmeri.com> wrote:

> On Feb 27, 7:05 pm, demp...@actrix.gen.nz (David Empson) wrote:
> > The video timing must be kept in sync with 28M, so it wouldn't make
> > sense to have another 16M clock input just for SHR mode. All the timings
> > for SHR mode must be derived from 28M.
> ...
> > This seems a little unlikely: it would result in odd and even columns of
> > pixels in 640 mode having different widths, but they might be able to
> > gloss over this due to the coarse horizontal resolution of the monitor,
> > together with dithering effects.
> 
> Interesting.  Well, how this all came about is Michael and I are
> trying to figure out why I'm seeing the RGB vid signal going to zero
> between pixels in the 640 mode only.  All other modes are
> continuous.

Perhaps it does 3 half-cycles of 28 MHz for each of two pixels, then 1
half-cycle of dead time? That would produce a small gap after every
second pixel, and produce a slighltly stripey effect, which makes some
sense.

> Due to limitations of my scope, I've not yet been able
> to analyze the duration and consistency of these zero-goings.
> Maybe what you've written here is a clue.  The zero spaces might be
> some kind of correction?

-- 
David Empson
dempson@actrix.gen.nz