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Re: 6502 illegal opcodes questions



Jim Brain wrote:
Michael J. Mahon wrote:

John Selck wrote:

Same opcodes but faster clockspeed. Also, CBM switched from NMOS to HMOS.


So this was an algorithmic rework of the original design for a new
process, not a new logical design.


This is splitting hairs. Bill Mensch created the 65C816 and 65C02 designs, which are most definitely *new*, as they did not share any of the original design. However, the '02 was not a new logical design, just a redo of the existing NMOS 6502 to take advantage of CMOS.

Not so.  The logical elements of the NMOS design are not present in
the same form in CMOS.  And the instruction decoding was clearly
redesigned, as was the control section (changed timings and bus cycle
patterns, new instructions).

It would be difficult to design new logic for a processor that preserved
the undocumented behavior of an earlier version--and impossible if new
instructions are added.

As well, I know there are ways to create new CPU designs that preserve undocumented behavior of older designs, designs that add extensive feature sets to the original design (8->16 bit transition, etc.) Even Intel has done so (the FFFF segment wrap in the 8086) as they created news designs.

That kind of behavior is of a completely different kind than random
bus clashes as multiple data sources are unintentionally gated onto
a bus!

At the end of the day, enough time passed with the NMOS 6502 core in play in the CBM world that it became the norm. It was (and is) not always seen as bad programming practice in the context of CBM development to utilize the illops.

Not the norm, I would say, but the *only* 6502 implementation ever
used on that platform.  I'd say that it illustrates my original point.

Long after the 65C02 design was available, lower power, faster, and
cheaper to make, the CBM line could not easily make use of it.

-michael

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Home page:  http://members.aol.com/MJMahon/

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