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Re: RFC : SOME IDEAS FOR THE APPLE II FPGA'ers
mdj <mdj.mdj@gmail.com> wrote:
>
> I like the idea of fitting in a standard slot except, in terms of
> complexity, it's almost equivalent to an FPGA based replacement board,
> and in some ways is actually harder. For one, you have to design the
> layout in such a way that it doesn't foul anything up when plugged into
> a real Apple II. Secondly, you're constrained your options in terms of
> acceleration, since you have to operate in terms of the real Apple II
> environment to remain compatible with the bus. This means that many
> potential acceleration ideas are unimplementable,
How much an Apple II would it be if there was no real Apple II at all ?
The Apple II as a concept ?
Don't you think you should "forgive" all the poor old Apple IIs in the
world their slowness, and do the the best that you can to circumvent it,
instead of trashing their MLBs in the first place ?
I believe there's still plenty of room to speed them up a lot.
Redesigning the slot interface because it's slow, in favor of a faster
one, is not an upgrade, is an, I don't know,
maybe an evolution: "Apple II EVO 4".
Isn't it better to speed it up as much as possible, but trash as little
as possible in the process ?
> and worse, you have to accept all the compatibility restrictions that
> existing accelerators have.
The disk II interface looks to me like the most important thing that
should not be trashed in the process.
It's at the same time the hardest problem.
> So, implementation complexity goes up, and the quality of the end
> solution goes down. Maybe I'm underestimating the complexity of
> replacing the whole board a little bit, but I think that worst case, we
> end up with a far more flexible solution for commensurate effort.
Even though I agree, it may not be a good idea to try to design a new
platform. There's a thin line that has to be drawn somewhere.
The slot interface is not too bad, not very limiting.
I would not like to trash it.
In an unaccelerated Apple II, it's full potential is not achieved at
all. It's the 6502's fault. The faster CPU controlled (not DMA)
throughput is 1/(LDA+STA cycles) MegaBytes per second.
This figure is a pitiful (1/8)MBps, or 125 KiloBytes per second..
In an accelerated Apple II, either the STA or the LDA come/go to fast
ram, and the other will require a single slow Apple II cycle, so it's
throughput skyrockets to 1MegaBytes per second.. !
Does not sound good enough ?
> Getting something operational can happen relatively quickly, and adding
> mind boggling performance enhancements down the track is relatively
> easy. Nobody's end goals are compromised, and virtually no extension
> that any of us can dream up is made difficult/impossible. It's a
> win-win
>
> In fact, the only real 'downside' I can see to this approach is that
> once such a thing exists, it pretty much destroys the 'market' for any
> future, and possibly existing Apple II expansion hardware. But then,
> from my perspective, this is actually a good thing, since ultimately
> consolidating everything into a unified solution creates a larger
> 'potential' market, since people don't have to wait a potentially
> endless amount of time to acquire the system they'd like, by competing
> with everyone else for the precious few components that appear on ebay
> each year.
A new platform... ?
> I would however like to highlight that when it comes to the Apple II,
> that I am in no way motivated by profit, only love, and when
> considering the way anything I'd like to be a part of reaches the
> supposed 'market', think "Apple ][ Reference Manual"
Yes, in a sense, we are all wasting our time.
--
Jorge Chamorro Bieling