Re: RFC : SOME IDEAS FOR THE APPLE II FPGA'ers

[bieling@terra.es (Jorge Chamorro Bieling)]

MagerValp <MagerValp@cling.gu.se> wrote:

> 
> FWIW the C64 DTV2 CPU core has features exactly like this. It's split
> up into two parts:
> 
>   1. Skip internal cycles
> 
>      This eliminates the dummy read/write cycles and turns implied
>      addressing instructions (NOP, TAX, SEC, etc) into single cycle
>      instructions, avoids the extra cycle when you cross page
>      boundaries, and so on.
> 
>   2. Burst mode
> 
>      Since the DTV2 uses 32-bit DRAM, the core can read 4 bytes in one
>      go. As long as the instruction doesn't cross a word boundary,
>      it's read in a single cycle. Immediate addressed instructions
>      take only a single cycle to execute, absolute 2, indexed indirect
>      3, and so on.

I'd like to learn more about this.
Any url pointing to "Understanding the C64 DTV2" please ? 

:-)

-- 
Jorge Chamorro Bieling