[no subject]

> But Steve W did plan for either in the beginning from what i heard. (
> though having never actually touched a model I, i could have been mislead
> )

The 6800 and 6502 have several control signals which differ, but the
address, data and power pins are in the same place. The different pins
are:

Pin     6502                    6800

2       RDY input               HALT input
3       Phi1 clock output       Phi1 clock input
5       N.C.                    Valid Memory Address output
7       SYNC output             Bus Available output
36      N.C.                    Data Bus Enable input
37      Phi0 clock input        Phi2 clock input (equivalent)
38      Set Overflow input      N.C.
39      Phi2 clock output       Three-State Control input

I doubt they had any intention of using the 6800 in an Apple ][, but it
might have been allowed for in the Apple I. I've never seen the
schematic or board layout (let alone a real machine). It would have
required a fair amount of alternative control logic or jumper settings,
but many of the signals in question can be ignored if not using DMA or
similar techniques.

The 6800 is generally more flexible than the 6502, e.g. it has a 16-bit
stack pointer and index register, two 8-bit accumulators, a more
complete set of branch instructions, etc. Its main disadvantage is only
having a single index register, doesn't have indirect addressing modes,
and the only indexing mode is an unsigned 8-bit offset from the index
register. The 6801/6803 was a slight improvement, as they added a 16-bit
accumulator (combining the two 8-bit ones).

My job started out doing assembly language processing on the 6301/6303,
which is a Hitachi variant of the 6801/6803 with a few more
instructions. A memory move operation was pretty awful: the best
solution I came up with was self-modifying code for one of the addresses
and using the X register for the other address, and it still took
something like 20 cycles per byte moved. Dealing with data structures
larger than 256 bytes is also a pain due to the 8-bit offset from X.
-- 
David Empson
dempson@actrix.gen.nz