[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Apple II Simulator



Bryan Parkoff wrote:

I have provided my information to the newsgroups -- "Cycle by Cycle Problem?", but I have thought some ideas in my own.
	(snip snip)

I think you're getting confused between 'cycle accuracy' and real-time accuracy (ie. speed of the simulation/emulation).

Generally when you're concerned with cycle accuracy, you're concerned with *relative* timings of events within the simulation. For example, you may want your cpu core to run different instructions with the exact same timing as a real 6502, and have the *exact* "time" elapse with respect to other events in the simulation for each instruction.

On the other hand, when concerned with real-time accuracy you're more worried about the average speed of the simulation as compared to the real thing. So, for example, games would run at the exact same speed as that running on a real Apple II.

These are two different goals, one not neccessarily required for the other, and have different approaches.

I'm not really sure what you're trying to achieve, and I'm not really sure you can actually achieve what you aim to the way I read it (of course I could be mis-interpreting you altogether).

Taking the approach of 'simulating' in timeslices (you suggest nano-seconds) is similar to circuit simulation and that used for simulation of FPGA designs. Generally this approach is very computationally expensive and is restricted to sub-components of systems, not whole systems themselves. The simulations are based on gate level and/or physical models of components and thier interconnections. And in some cases it can take several *hours* to simulate a few micro-seconds of design!

Emulators such as MESS don't concern themselves with such accuracy because, for most purposes, it is not required. It can afford to allow the CPU to execute even a handful of instructions before worrying about the rest of the system because there's nothing that really cares too much about relative timings within the system. And sure, there's always some exception for some tricky piece of software but more often than not - it's by accident rather than design!

If you're really interested in cycle-by-cycle simulation of the Apple, I'd suggest you look at implementation of the original circuit within an FPGA. You can generate all the right clocks on the board and have each part of the circuit run exactly as the original circuit did - and in real time too!

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"