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Re: RAM-4-GS Progress



"Sean Fahey" <a2fan@hotmail.com> wrote in message
news:qx8Qd.9660$D34.444@newssvr12.news.prodigy.com...
:
: "Bill Garber" <willy46pa@comcast.net> wrote in message
: PJmdnRTn4qPPmozfRVn-2A@comcast.com">news:PJmdnRTn4qPPmozfRVn-2A@comcast.com...
:
: > Was I not clear, or you being sarcastic???
:
: Yah, I should have typed in something other than "heh".
: It wasn't a laugh, it was more of a signal of curiousity.

Ok, now that I understand you. The use of CROW0 and CROW1
to select the row being written and read makes it DMA compliant.
Thusly, the ram address being written to and read from is selectable.
You can write/read to/from any address you like. Unlike FIFO where
the address is the next address in line, and the memory is moved up
in the stack and read from the top.

Apple II Forever, Apple II Together
Bill @ GarberStreet Enterprizez
Web Site - http://garberstreet.netfirms.com
Email - willy46pa@comcast.net