Re: 6502 / 65C02's Invalid Address Bus

[David Wilson <david@uow.edu.au>]

BryanParkoff@yahoo.com (Bryan Parkoff) writes:
>mjmahon@aol.com (Michael J. Mahon) wrote in message news:<20040911034154.17374.00000492@mb-m27.aol.com>...
>> Bryan Parkoff wrote:
>> 
>> >I find an interesting issue that invalid address always occur when
>> >page boundary is crossed.  Low Byte of Address Bus is always correct,
>> >but High Byte of Address Bus is always invalid until extra cycle to
>> >correct High Byte of Address Bus.

This is all a consequence of the fact that the 6502 has an 8-bit ALU.
It cannot add the 8 bit index to the 16 bit address and propagate the
carry in one cycle.  It needs a 2nd cycle. If the instruction is a read
(LDA etc) add the addition does not need a carry the processor does the
instruction in one less cycle.  If the addition does need a carry (or
the instruction is a write (STA etc)) then the instruction takes the
extra cycle and generates a false read.

>> >    Understanding Apple //e manual claims that 65C02 has fixed invalid
>> >address on fourth cycle, but 65816 is not fixed.  I have not tested
>> >Apple //e and Apple //c yet.

>    Can you please comment why WDC did not fix 65816's invalid address
>bus?  I am very curious.

I seem to recall that the 65816/65802 was made more compatible with the
6502 than the 65C02 was.

See "Programming the 65816: Including the 6502, 65C02, and 65802"
by David Eyes, Ron Lichty (or even the 65816 data sheet) for more info.
-- 
David Wilson  School of IT & CS, Uni of Wollongong, Australia