Re: Apple II mistery card...

[et472@FreeNet.Carleton.CA (Michael Black)]

"a" (a@aol.com) writes:
> Michael  wrote
>> There is typically a small RC delay network on Phase 2 to interface
>> a 6522 to the Apple bus.  A gate is usually used to buffer the delayed
>> (and rounded) signal before driving the 6522.
>>
>> -michael
>>
> 
> Do you have an idea how much time delay is necessary?
> I've been trying to work that out from the 6502 datasheets and the 6522
> datasheets.  If the two chips were connected directly together it seems
> that such a delay wouldn't be necessary because the phase-2 output
> of the 6502 would be used.  However, it appears that
> the apple II system uses phase-0 as phase-2 was intended to be used and
> that phase-1 on the apple board is directly out of phase with phase-0.
> Whereas, the 6502 datasheets illustrates phase-0 as being used only
> to set the 6502 clock frequency and that the phase-1 and phase-2 outputs
> from the 6502 should be used for system timing.  I'm sure there's a story
> about why Woz decided to do it this way.  Any how, two things would help:
> 1) good idea on how much delay is necessary. (6502 data sheet doesn't say
>     how much the phase-1,phase-2 outputs lag the phase-0 input) Is it
> possible
>     that no delay at all would work?
> 2) a schematic of a working card that was in production or that someone
>     homebuilt that they have confidence in.  (I'm scared of frying things)
> 
> I've studied the apple serial card schematic that uses the MC6850 for
> the serial line driver and its chip select input doesn't need any delay from
> the phase-0 signal from the motherboard.  That got me thinking that I
> was worried about nothing and should just try no delay.
> 
> thanks.
> 
> 
It has something to do with the Apple putting the wrong signal on the bus,
as you write.

There was something about this in Kilobaud years ago, in a column.  It
was news then, but by now it must be fairly common knowledge.

  Michael