Re: CPU's Timing Question

[tomcharlesworth@blueyonder.co.uk (Tom Charlesworth)]

"Bryan Parkoff" <bryan.nospam.parkoff@nospam.com> wrote in message news:<r6Orc.12675$Hh.12325@fe1.texas.rr.com>...
> Why is CPU's timing very important to these Apple II Slots and DMA?  I
> have noticed that most emulators ignore one extra cycle when it has crossed
> page boundary.  For example, BEQ, BNE, BCC, BCS, and other relative branch
> instructions should be 4 cycles WHILE branch is executing across page
> boundary, but emulator only show 3 cycles instead of 4 cycles.
>     Another example, each instruction uses X or Y Indexed such as LDA
> $3FFF,X that they take 5 cycles during it has crossed page boundary, but
> emulator only shows 4 cycles instead of five cycles.
>     Wrong count cycle timing may affect Disk II card, Sound Card, and etc.
> If you intend to write 6502/65C02 assembler code to measure cycle counter on
> real Apple II that it matches real timing.  Take this assembler code to
> emulator and test.  You may find the difference.
>     Do you think that emulator programmer do not care to add only one extra
> cycle that it will be very accuracy?  What is the reason?  I am curious.

AppleWin certainly has this problem (1.10.4 & 1.12.3). When it was
written 10 years ago(!) the speed of the x86 was poor so shortcuts
were made to the 6502 emu code (which is written in asm) to squeeze as
much performance from it as possible.

Off the top of my head, I can think of a few things the could be
affected by this emu limitation:
- Mockingboard detection routines that time some 6502 opcodes using
the 6522's timer. Eg. Skyfox - but this doesn't use page crossing
opcodes.
- AppleWin's speaker emulation creates a square-wave in realtime using
the cycle count. If a game's sound driver uses page-crossing opcodes,
then it could play back at the wrong pitch. Michael has already
expanded on this.

I'll get this fixed.

Tom