Re: CFFA and my Apple ][+ equals: timing touble

[mjmahon@aol.com (Michael J. Mahon)]

Rich wrote:

>As I said before, I have started working on a new firmware.
>The changes all worked great in my //e platinum, but crashed
>in my ][+. Remembering I had problems with my ][+ during the
>original development, I decided to take another looks at the
>bus timing. I see a major problem!
>
>Their seems to be a difference between the //e platinum and ][+ when it
>comes to the relationship of /DEVSEL and the 7M clk signal.
>Basically, the /DEVSEL is shifted in relation to the 7M, and this
>is screwing up the timing when plugged into my apple ][+.
>I use the 7M clock to create a delay, so the /IORD and other signals
>have the correct timing.
>
>If my ][+ can be assumed to represent a typical ][+, then there
>is little change others will get it working either. Or, if others do
>work, it is very marginal at best.
>
>My free Altera dev system license ran out, so I am now downloading
>the lastest version, and a new license. I will let you all know I come
>up with a new version. I don't think it is something that will effect
>//e or later users. In fact I fear, I may have to have one CPLD for
>the ][+ and one for the //e enhanced or greater.

The timing differences between the //e and the older ]['s are
pretty well-known.  As you might expect, if a card was designed
to work with the older machines, it will (usually) work in the //e,
but the reverse is not the case.  The //e designers knew that
the machine had to support almost all the ][/][+ cards.  (One
card that was notorious because of its syncopated timing and
DMA access was the Microsoft Softcard--it worked in some //e's
and not in others, resulting in a redesign for the //e.)

I'm sure that you will find a timing that will provide ample setup
and hold times for both classes of machine.

Ironically, the new timing may also correct some current cases
of marginal operation (such as with fully-loaded, accelerated
systems).

-michael

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