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Re: 3.5 drive on II+
Peter Ibbotson wrote:
Michael is right. IIRC the problem is in the hold time on the data bus the
cmos part removes the data too quickly for the data bus latches to work
reliably. One of the Apple //e tech notes discusses the problem (In this
case between a 6502 and a 6502A but the same thing applies).
There's a one-wire mod which lets most 'C02s work on a II+. I dug the
attached up from Bob Sander-Cederlof's 'Assembly Lines' newsletter. It
worked fine on my II+.
A Different Patch for 65C02 & Old Apples...William O'Ryan Jr.
Since my earlier letter (Jun 84) on the 65C02 and the Apple II+ I was
interested and gratified to read Andrew Jackson's (Dec 84) and Jim
Sather's (Mar 85) letters on the same subject. However, two things
began to worry me. First, the smallness of the time gain in the F257
chips (around 7 nanoseconds, I understand). That did not seem enough
to be very reliable. Second, a friend in town has an Apple whose
speed was not sufficiently improved to allow the 65C02 to work
(although there was some noticeable improvement).
After reading the first few chapters of Jim Sather's book,
"Understanding the Apple II", I was able to come up with a new
solution. As I figure it, this new solution yields an improvement of
around 70 nanoseconds, more than enough. Simply put, just replace the
-RAS line inputs to the 74LS174 chips at B5 and B8 with AX. AX rises
70 nsec earlier than -RAS, enabling those chips to latch RAM output 70
nsec earlier. It is a simple patch and may be done either with or
without altering the motherboard.
I tried it first without altering my motherboard, on a Rev 44-1 Apple
using 200 nsec 16K RAM chips. I was surprised to see it work, as I had
expected that 200 nsec RAM chips would be too slow for the patch. (I
haven't tried it yet with 250 nsec RAM chips.) Actually, this
particular Apple did not need any speed-up -- the 65C02 was already
working in it.
To do this patch: remove the chips at B5 and B8; seat an extra socket
under each of them; pin 9 on these sockets should be bent out so they
do not go into the motherboard sockets; remove the chip at C2 and put
an extra socket under it; connect a wire from pin 14 of the C2 socket
to the bent out pins 9 of B5 and B8. Pin 14 of the 74S195 at C2 is a
source of the AX signal; pin 9 of B5 and B8 was previously connected
to -RAS.
<<<picture>>>
I have another Apple (Rev 4) which has 24 150 nsec 64K RAM chips
(using the Cramapple mod). This Apple already had F257's in it with a
65C02. I put the old LS257's back in, and sure enough the 65C02 began
to stumble. Then I removed the motherboard and on the underside cut
the trace to -RAS and soldered in a jumper wire to pin 14 of C2. It
worked perfectly!
<<<picture>>>
Naturally those who try any of these patches do so at their own risk.
I must thank Jim Sather for his book; it was only by studying the
timing diagrams in that book and staring at the circuit diagram
published by Apple that I was able to do this. I hope some of the
hardware types will be able to tell me if I have built a time bomb. I
am also very interested to hear whether the problem with the 65802 is
the same.
Jumper wires
Pins 9 not
plugged into RAS
View from top front
74LS195
74LS174
74LS174
AX
Underside of
motherboard
viewed from rear
Jumper wire
Cut
trace here
AX
RAS
RAM