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Re: Building an Apple II from scratch



On Wed, 16 Jul 2003 05:11:14 +0000, RedskullDC wrote:

> 
> "Great Hierophant" <great_hierophant@hotmail.com> wrote in message
> 9745d197.0307141557.96b3a52@posting.google.com">news:9745d197.0307141557.96b3a52@posting.google.com...
>> Yesterday, I took a look at the circuit diagrams and schematics of an
>> Apple II found in the Apple II Reference Manual (the Red Book.)  I was
>> struck with the number of components used, but also with their
>> commonality.  In an original Apple II, there does not seem to be any
>> custom chips or devices, unlike the later Apple IIes and IIcs.  Most
>> of the Apple II/II+ seems composed of standard TTL logic chips.  The
>> 6502 CPU can be found.  The ROM, all 12-16KB of it, can easily fit on
>> one EPROM.  48KB of DRAM can be done with two chips.   The connectors
>> are probably standard.  Of course, one does not have to build a power
>> supply  and can use an Apple II keyboard.  So, has anybody ever
>> constructed an Apple II mainboard in the way I have described?
>>
>> GH
> 
> You should be able to program the entire thing into one of the larger FPGA
> chips available at the moment, or at least 90% of the logic.
> 
> There are several places with a free 6502 compatible core available.
> One which immediately springs to mind is:
> http://www.free-ip.com/6502/
> 
> If you get as far as understanding the logic of the core, you will find it
> easy
> to add most of the support chips in logic: 6551 for serial, etc.
> 
> I'm currently working on building a Tandy TRS-80 model-1 onto a board
> 5"x5" using similar sorts of stuff.
> 
> Cheers,
> Red

Interesting you should mention that... I've been coding an apple //e in
verilog for an XC40010E. I'm using an XESS board with a little intel
microcontroller. I'm putting all the support logic on the FPGA, using the
onboard 128kb memory as system memory and then emulating some of the logic
that won't fit on the FPGA with the 8031.

My design does not include the video or disk controllers, but rather loads
a disk image on the fly off the parallel port from an x86 box. The
communication is very simple with request block / save block style
commands that are interfaced via a trap. Fun stuff. You guys know I'll be
posting questions very soon :-)
-Kp2