Re: ZIPGS 2-pin Crystal

[mjmahon@aol.com (Michael J. Mahon)]

Andrew Webber wrote:

>Wayne Stewart <waynes@intergate.ca> wrote in message
>news:<3D148827.A35D8869@intergate.ca>...
>> Andrew Webber wrote:
>> 
>>  
>> > Thanks for that, but what I still don't understand is how having the
>> > Cache in the 2nd bank but not being used makes the card stable. The
>> > dip switches are set to 32K, but there is 64K cache installed. The
>> > card is completely unusable with the 2nd bank taken out (still 32K
>> > installed).
>> > 
>> > Andrew
>> 
>> Shouldn't make any difference whether the second bank is there or not
>> if the dip switchs are set to 32k. Sometimes things do work in 
>> implausible ways
>> 
>> 	Wayne
>
>
>I tried the same setup on my 2nd ZIP (same revision 1.01) and it does
>the exact same thing with only one bank installed (not stable). As
>soon as you fill the 2nd bank and set to 32K. Weird. Well at least
>they work. Thanks for all your help

The probable cause is that the slightly increased capacitive loading
of the second chip causes the SRAM output to become stable at a
slightly different, and more favorable, time for sampling by the faster
processor.  Usually, adding capacitance only hurts setup time, but
not if the signal is "bouncing" without the load.

Glad you found a way to make it stable.

-michael

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