Re: Opcode Instruction Question

[dempson@actrix.gen.nz (David Empson)]

Bryan Parkoff <BParkoff@satx.rr.com> wrote:

>     I know that 65816 microprocessor always has 256 opcode instructions
> while Intel microprocessor has more than 256 opcode instructions.  For
> example, 65816 uses equal '=' for JMP, but Intel uses '=', '>', '<', '>=',
> and '<=' for JMP.

What does '=' have to do with a JMP instruction?

If you are talking about "compare and jump" operations, then the 6502
family has no such instruction - JMP is unconditional.

The 6502 does have a series of relative branch instructions, which
branch conditionally, often on the result of a previous compare
operation.  There are eight of these on the 6502: BVC, BVS, BCC, BCS,
BEQ, BNE, BMI, BPL.  Each of these tests the state of a single flag in
the processor status register, and branches depending on whether that
flag is set or clear.  The 65C02 adds BRA (uncondtional branch), and the
65816 adds BRL (long unconditional branch).

Other processors typically have a wider range of branch instructions,
which test combinations of condition flags.  This allows them to use a
single branch instruction to perform signed and unsigned versions of
"branch if less than", "branch if greater than", "branch if less than or
equal" and "branch if greater than or equal".  To implement many of
these operations on the 6502 family requires several branch
instructions.

The original 6502 omitted these extra instructions in order to simplify
the processor design (and to save about eight opcodes, which probably
wasn't a factor in the design, as there are a lot of spare opcodes on
the 6502).  Subsequent family members didn't bother adding them back
again.

>     It looks like that 68K and PowerPC don't use many needed instructions.

Do you mean that they have a lot of opcodes which don't have defined
behaviour?  This isn't surprising - most processors have at least a few
opcodes which are not implemented.  (The 65816 only has one: $42.)

If you start with a potential 2^16 (65536) opcodes, as on the 68000, and
you have a complex instruction set which defines fields within the
opcode word to specify the instruction and some operands, you are bound
to end up with unused ranges of opcodes.

The 6502 also had a lot of unused opcodes.  Several of these were
implemented by the 65C02, and the 65816 used all the remaining ones
(except one, which was reserved for future expansion).

> If it is more than 256 opcode instructions, how can the microprocessor hold
> 16-bit opcode instruction while 65816 uses 8-bit opcode instruction.

Some of the bits in the 16-bit opcode can be used to hold operands for
the instruction.  For example, the 68000 has an "Add Quick Immediate"
instruction which has a limited range of values which can be added to
the specified data register.  Three bits of the opcode specify the
source/destination register, and three bits of the opcode specify the
value to be added to the register.

Having the operand in the opcode word means that it is not necessary to
fetch another word from memory in order to get the operand for the
instruction, so the execution time is reduced.

There isn't usually enough space to do this sort of thing in an 8-bit
opcode.  The register (or registers) can be specified, but there aren't
enough bits available to store operand values.

Take the 8080/Z80 as an example, which also have 8-bit opcodes.  Its
instruction for moving an 8-bit register to another 8-bit register uses
up 49 opcodes, since it can specify any of seven registers for the
source and destination (A, B, C, D, E, H, L).

8-bit micros tend to have a tradeoff between complex addressing modes
(as on the 6502) and a large number of registers (as on the Z80),
because there aren't enough opcodes to cover both sets of features.

With a 16-bit opcode, there is enough space to allow both sets of
feature (as on the 68000).  Some 8-bit micros provide a similar level of
functionality by using multiple bytes for their opcodes, usually varying
the instruction length as appropriate, with frequently used instructions
being shorter than infrequently used ones.

-- 
David Empson
dempson@actrix.gen.nz