Re: IIgs questions

[Rubywand <rubywand@swbell.net>]

frankc writes ...
> 
> Is everything in the IIgs like a RAM location?  What I mean is could the
> IIgs be represented by a bunch of RAM locations in an emulator or by a
> memory chip?

     Everything is pretty well memory mapped; but, accessing some locations
(e.g. soft switches) produces special effects-- not like a memory chip-- and the
mapping can change.


> If it is completely memory mapped then a high speed CPU
> could "think" it was running on a IIgs while a slower chip provided the
> glue between this abstraction and the real system.  Is this correct?

     Yes, except that you would want the 'glue' to be pretty fast, too.


> Another thought about accelerators:  Does anyone know theoretically how
> these work?  I thought it could use wait states of some sort to slow
> down the access to the "system" but am not sure how fetch and caching
> work.  Is the caching a function of a DMA controller or is it performed
> by interupting normal processing somehow?
>
 ....

     Don't know how this is handled by accelerators on a IIgs. I'm pretty sure
normal processing would need to wait during cache loads.

     Someone with accelerator or emulator design experience could give you a
better answer. 



Rubywand