IIgs questions

[frankc <frankc@srv.net>]

Is everything in the IIgs like a RAM location?  What I mean is could the
IIgs be represented by a bunch of RAM locations in an emulator or by a
memory chip?  If it is completely memory mapped then a high speed CPU
could "think" it was running on a IIgs while a slower chip provided the
glue between this abstraction and the real system.  Is this correct?
Another thought about accelerators:  Does anyone know theoretically how
these work?  I thought it could use wait states of some sort to slow
down the access to the "system" but am not sure how fetch and caching
work.  Is the caching a function of a DMA controller or is it performed
by interupting normal processing somehow?

Thanks,
Frank