Re: 65032: Re-designed 65c832

["Arkain" <rwking@no.usa.spam.net>]

The idea is just to give the system access to a full 4GB memory plain when
in 32bit mode. The registers will look just the same as you would expect in
16bit and 8bit mode.  I don't intend to forfeit anything more than pin
compatibility with this new chip.

Arkain

Matt Jenkins <mdj@bilby.cs.rmit.edu.au> wrote in message
3992480a@naylor.cs.rmit.edu.au">news:3992480a@naylor.cs.rmit.edu.au...
> Arkain <rwking@no.usa.spam.net> wrote:
>
> I don't see why not, as long as you don't do anything that would break
> compatibility with existing 65816 code (since the processor is intended
> to be backward compatible), which might be a problem if you mess with
> the bank select register.
>
> The original 65832 was intended to be pin compatible with the 65816, so
> I'd keep that in mind.
>
> --
>               Matt(hew) Jenkins. Computer Science (RMIT Bundoora)
>                            email: mdj@cs.rmit.edu.au
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