Re: Zip GS questions

[pubpc1@library.ucla.edu]

Barry Rees <Barry.Rees@prodigy.net> wrote:
>There's been a lot of experience being shared here regarding CPU speed
>vs. cache size. However, something to keep in mind is that the 600 mil
>SRAMs are no longer made nor carried in stock by anyone that I know of
>(including JDR Microdevices). If you can find any (32k x 8, 28 pins, 600
>mil, 45ns or faster) SRAMs, you will be fortunate. That's what you will
>need to go to a full 64k cache on any ZipGSX that has 600 mil sockets
>installed. Those SRAMs are generally good to 12-12.5 MHz with an
>oscillator and 65C816 CPU change -without- doing any surgery on the
>board and getting involved with the 300 mil SRAMS. Of course, as always,
>you mileage may vary.

Barry, I have the latest catalog from JDR Microdevices and it seems that
they are again carrying the 32k x 8, 28 pin DIP, 600mil chips.  These
SRAMs have been reported to be good to the vacinity of 10MHz.

To use the 300mil SRAMs without major surgery is pretty easy.  Just build
yourself a 300mil to 600mil socket adapter like I did.  Get a 600mil 28pin
DIP component carrier and a 300mil, 28pin wire-wrap style DIP socket.
Bend the wire-wrap socket's contacts side ways and solder these to the top
of the DIP component carrier's corresponding contacts.  These custom
adapters work well for my 13.75MHz upgraded board (they are used in the TAG
sockets).

Paul Creager said that the adapters from Digi-Key didn't work.  The reason
that these custom ones are better than the Digi-Key ones may be that
I used high-quality parts with gold contacts, thus no oxidation and less
noise.

If Nate wants to, he is free to update his Zip/TWGS FAQ with this info
(also should state than 15ns is too fast for both TAG and CACHE and should
use slower ones in CACHE - the FAQ should note this).

:)

-Scott G.