Re: IIgs slot 7 not responding

["Michael J. Mahon" <mjmahon@aol.com>]

James Littlejohn wrote:
> On Mar 11, 4:20 am, "Michael J. Mahon" <mjma...@aol.com> wrote:
> > James Littlejohn wrote:
> > > I am re-visiting this problem. Turns out that I had 2 traces damaged
> > > going between sockets. But, still not getting a Low signal on pin 41
> > > on any socket when I access it with a "PR#X". Could it be that the
> > > 'Slotmaker' is bad, or is there some other way to check it?
> > PR#s accesses the slot ROM space at $Csxx, causing /IOSEL (pin 1) to
> > go low, but unless code in the ROM there accesses the slot device space
> > at $C0Sx (S=s+8), the /DEVSEL signal (pin 41) will not go low.
> >
> > -michael
> >
> > ******** Note new website URL ********
> >
> > NadaNet and AppleCrate II for Apple II parallel computing!
> > Home page:  http://home.comcast.net/~mjmahon/
> >
> > "The wastebasket is our most important design
> > tool--and it's seriously underused."
>
> Will it hold it (pin#1) low till it responds, or is it just momentary?

It's just for a single cycle--think of it as a R/W qualifier.

It's purpose is to enable the ROM on the card, so it's only present
during the read/write phase--the memory is expected to be able to
meet the access time constraint.

-michael

******** Note new website URL ********

NadaNet and AppleCrate II for Apple II parallel computing!
Home page:  http://home.comcast.net/~mjmahon/

"The wastebasket is our most important design
tool--and it's seriously underused."