Re: IIgs peculiarities

[dempson@actrix.gen.nz (David Empson)]

vladitx <vladitx@nucleusys.com> wrote:

> On Feb 22, 10:40 pm, demp...@actrix.gen.nz (David Empson) wrote:
>
> > Same for a ROM 1 or ROM 3. If you enter the CDA menu while the monitor
> > is waiting for input, the speed register is temporarily changed, but the
> > monitor's KEYIN routine restores it to the prior setting as soon as you
> > press a key. (Or it might be the line input routine - I'm just aware of
> > never being able to have the speed setting "stick" when entering the CDA
> > menu while the standard line input routine is waiting for input.)
> 
> I tried with a short BASIC program drawing a circle. Speed definitely
> changed (and probably CDA accessed from BASIC prompt), but
> nevertheless - same value in $C036.

After doing some tests, I have to revise my description slightly.

It appears that the monitor always forces fast mode while it is active
($C036 contains $80), no matter what the Control Panel says.

The monitor saves the speed register on entry (e.g. CALL -151 or when a
program executed with G returns) and restores it on exit (e.g. when you
use a G command or Ctrl-C).

It also saves the speed register and temporarily forces fast mode while
waiting for input, so if you use the Control Panel to change the speed
while at a prompt in BASIC, it doesn't stick immediately.

If you change the speed in the Control Panel while a BASIC program is
running, the change does take effect immediately, and is retained, but
if you then go into the monitor you will see $C036 containing $80
because the Monitor has temporarily forced fast mode.

A few tests involving peeks and pokes in BASIC to location 49206 ($C036)
are sufficient to prove what is going on. Only waiting for input
interferes with changes in the Control Panel.

Note that the Control Panel also modifies nonvolatile memory and the
RAM-based copy of the nonvolatile parameters, and if you press
Ctrl-Reset, the Control Panel setting will override any temporary
changes made by writing directly to $C036. Of course you won't see this
in the monitor, because it is forcing fast mode temporarily, but you can
see it BASIC with a peek.

> > > I still wonder what "MSIZE" signal does. It is shorted to ground on a
> > > certain memory expansion board, so must be input to FPI.
> >
> > (Without checking documention which is buried away...) It tells the FPI
> > whether the memory rows are 256 KB or 1 MB, and thus how to set up the
> > CROW memory mapping, and it may influence refresh cycles.
> 
> Correct. I found that bit of info in the IIgs Hardware Reference.
> 
> Problem with scanned copies is that one cannot search. :-)

Same problem with my physical copy, so I don't see how you are any worse
off. :-)

> > There is a DMA bank select register in the FPI which allows DMA to any
> > bank, but the FPI only outputs the CROW signals during a DMA cycle. It
> > doesn't output the DMA register in the first half of the cycle.
> 
> I found a paragraph about DMA, too. Still unclear, but as far as I
> understood it, Mega II gets in touch with FPI to organize DMA to fast
> RAM.
> I have to research more.

Mega II isn't involved in DMA to fast banks (it has no knowledge of
memory outside its own two banks).

The FPI is in charge of all memory accesses (both CPU and DMA), and only
hands them over to the Mega II when addressing banks $E0 and $E1
(possibly via shadowing). If the IIgs is runing in fast mode, it
requires a sychronization between the 2.8 MHz cycle an the 1 MHz cycle.

For a DMA cycle to fast memory, the FPI gets the bank from its DMA bank
register, and handles the entire thing without touching the Mega II.

For a DMA cycle to slow memory, the FPI gets the bank from its DMA bank
register, synchronizes with the Mega II, selects the appropriate Mega II
bank and the access is then handled by the Mega II.

> > > Are you sure DMA can have I/O in a bank different than $E0?
> >
> > 100% certain. See above, and every IIgs-specific DMA card (including
> > Apple's own "High Speed" SCSI card) fully supports DMA up to the 4 row
> > limit in the memory expansion card (plus all of the built-in RAM).
> 
> Is there any document besides Hardware Reference which sheds light to
> the DMA?

I doubt it. Nobody wrote a IIgs-specific book of the calibre of
"Understanding the Apple II".

> > > Speaking of which, does anyone have schematics of ROM 03?
> > They are in the 2nd edition of the IIgs Hardware Reference.
> 
> My scanned copy doesn't have the Addendum.

There is no addendum, just fold out sheets at the back of the manual
with two sets of schematics (256 KB and 1 MB logic boards).

-- 
David Empson
dempson@actrix.gen.nz