Re: 6502 trashing memory cycles...

[wv9557@yahoo.com]

On Mar 4, 2:12 pm, "biel...@terra.es" <biel...@terra.es> wrote:
> Hello,
>
> I've been having a look at the 6502 instruction details in the
> databooks and in uta2,p20..23. I've never realized that the 6502
> trashes so many memory cycles here and there. For example 3 out of the
> 6 cycles of an RTS are useless. 2 out of 4 of a PLA are useless, 1 out
> of 2 of a DEX are useless.
>
> The table in uta2,p22, shows the instructions classiffied in 29
> groups. 22 out of the 29 opcode groups trash between 1 and 3 memory
> cycles..!
>
> A clever circuit could make good use of so many memory cycles for some
> other purpose... any ideas ?
>
> Jorge.

The RTS is a fairly complex instruction. First it has to put SP on the
memory bus to get half of the saved pc, then sp+1 on the memory bus to
get the other half of the saved pc, then it puts the saved pc on the
memory bus to get the next opcode. That's 3 memory cycles. The NOP
alone takes 2 cycles. So I think it's fair that RTS takes 6.