Re: Read full 8-bit character from serial port?

[bieling@terra.es (Jorge Chamorro Bieling)]

David Empson <dempson@actrix.gen.nz> wrote:

> 
> The standard Z8530 SCC has a 3 byte rx buffer. The ESCC (Z85230) has an
> 8 byte buffer.
>
> Assuming 9600 bps with 8-n-1 data, if you aren't using interrupts, you
> will have to poll the SCC at least once every 3 milliseconds (on
> average) to avoid losing characters, and if you are polling it less
> often than once every millisecond, you may have to receive several
> characters in a loop to avoid running out of buffer space.

More or less. Keep in mind that :

1.- There can be 3 rx chars standing in the 3 bytes deep rx buffer and
at the same time a 4th rx char being assembled (received) into the
receiver, and you won't get an overrun.

2.- Once a 4th rx char has been completely assembled (received) into the
receiver, you won't get an overrun either : the receiver can be thought
off as a 4th buffer byte.

3.- In fact it's not until the *5th* rx char start bit appears at the
SCC RxD pin that an overrun will happen.

Even at 115200 bits/s, there are going to be *at least* 95 cycles (Apple
II cycles) between chars. That is plenty of time for polling *even
without any buffer* :

WAIT_RX         LDA SCC_A_DATA  //4 cycles
                AND #$01        //2 cycles, 6
                BEQ WAIT_Rx     //2 cycles, 8

                LDA #$01        //2 cycles, 10
                STA SCC_A_CMD   //4 cycles, 14
                LDA SCC_A_DATA  //4 cycles, 18
                AND #$70        //2 cycles, 20
                BEQ ITS_OK      //2 cycles, 22
                JMP THERE_WAS_AN_RX_ERROR

ITS_OK          LDA #$08        //2 cycles, 24
                STA SCC_A_CMD   //4 cycles, 28
                LDA SCC_A_DATA  //2 cycles, 30
                JSR STORE       //6 cycles, 36
                JMP WAIT_RX     //3 cycles, 39

That is, the STORE routine could be up to 95-39=56 cycles long.
-- 
Jorge Chamorro Bieling