David Empson wrote:
The only question that remains: is it true that the 65C02 take one extracycle for ADC/SBC when then D flag is set? I'll have a look at the official data sheet.Yes, according to information in the data sheets (which I don't have handy and can't verify). The issue is that the original 6502 didn't implement all of the status flags for ADC/SBC in decimal mode: the N flag in particular is not updated (also the V flag, if I remember right). The Z and C flags are handled correctly.
Accoriding to the algorithm used in VICE, the N and V flags are updated, but according to a bunch of crazy formulae which are quite useless (unless you're a hardcore demo coder maybe). So you can't rely on them staying unchanged either. Nothing's quite as bad as the ARR illegal of the NMOS 6502 though (which combines fragments of ADC with fragments of ASL and some internal bus contentions, as it seems).
-- Linards Ticmanis