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Re: Emulating 65C02 in ARM
Since the ARM's psr flags (n/z/c/v) match up *so close* to the 6502s, by
left shifting your 8-bit values 24 bits before doing arithmetic, you get
them for free. Taking a cursory look at the ARM instruction set, it looks
like it could emulate any 6502 instruction in 4-5 instructions (not counting
overhead from loading memory and other emulator house keeping).
Pretty nifty.
"Charlie Springer" <RAM@regnirps.com> wrote in message
0001HW.BF33BF22000084FCF04075B0@news.nw.centurytel.net">news:0001HW.BF33BF22000084FCF04075B0@news.nw.centurytel.net...
> Have any of you seen speed results for 65C02 emulation in ARM7? 60 MHz
> ARMs
> with RAM and FLASH on chip are getting pretty cheap. I have a Forth I
> wrote
> for one but I have not tried for an efficient detailed 65C02 emulation and
> I'm looking for results measured in "instructions per instruction" so to
> speak. Since (nearly) all ARM instructions are one cycle, I could get an
> emulation equivalent cycle count for a speed comparison.
>
> Cheers,
> Charlie Springer
>