Re: Slowest IIgs RAM

[Eric Smith <eric-no-spam-for-me@brouhaha.com>]

"Bill Garber" <willy46pa@comcast DOT net> writes:
> To answer your question, yes they would be fast enough. I see no
> noticeable speed change from 70-120 ns simms in the RAM-4-GS, so,
> I'd say 150-200 wouldn't be that noticeable either.

That doesn't follow logically.  The rated speed of the DRAMs doesn't
affect the speed of the IIgs; the RAM will either work reliably, if
the requirements are met, or be potentially or actually unreliable or
nonfunctional if the requirements are not met.  The Apple IIgs circuitry
does not adjust its timing to the particular DRAM chips; in fact it
has no way to know what the DRAM ratings are.  (In modern PCs, the
BIOS will actually read rating data from the "SPD" chip on the DIMM,
and program the memory controller in the north bridge chip accordingly.)

The is some maximum access time for DRAMs that will work correctly
in the IIgs.  DRAMs with a lower access time rating, while capable
of faster operation, will not actually operate any faster in the IIgs
because the actual cycle time in the IIgs does not change to accomodate
the DRAM.  So the fact that DRAMs rated at two particular speeds seem
to work fine with the same observed performance does not provide any
information regarding whether slower DRAMs will work.

DRAM ratings are specified for a wide range of temperature and voltage.
It is likely that if you used parts with a rating that is not fast
enough, they may actually work at room temperature and nominal voltage,
but they may not be as reliable as memory with the correct rating.

A complicating factor is that the rating normally quoted for DRAMs is
the access time.  Although this is important, and a proper analysis
will require it, when you try to determine the RAM needed for a 2.8 MHz
memory bus the first specification you need to consult is the cycle time.
This information is generally only available from the DRAM manufacturer's
data sheet; the cycle time is obviously longer than the access time, but
there's no particular way to derive one from the other.

Unfortunately the IIgs Hardware Reference does not appear to give
sufficiently detailed timing information to determine the required
memory rating.

For a 2.8 MHz memory bus, you need no DRAMs with no longer than 349 ns
cycle time.  Typically a DRAM with 200 ns access time specification
require longer than 349 ns cycle time.  DRAMs with 120 ns access time or
better almost certainly have less than 349 ns cycle time.

However, even if the cycle time specification is met, there is still
some requirement for the access time; we just don't know what it is.
This is determined by the interval between when the IIgs starts the
memory cycle by asserting the RAS strobe, and when it latches the
memory data.

Initially I thought that probing the IIgs memory bus with an
oscilliscope would help determine the nominal memory bus timing; adding
10% or 15% margin to the observed timing would account for necessary
setup times and temperature variation.  I just measured the RAM and CAS
timing of my IIgs, but now realize that this isn't adequate because we
don't know exactly when in the memory cycle the data is latched.
(Obviously at some time during the CAS strobe).

I'll observe that my 1M IIgs uses Toshiba DRAMs with 100 ns access time,
and my RAM GS card uses Mitsubishi DRAMs with 100 ns access time.  It
seems unlikely (but not impossible) that Apple and Sequential Systems
would have paid more to buy faster DRAMs than necessary, becuase it
would not have yielded higher performance.

If I were buying DRAM for a IIgs memory card today, I'd be inclined to
get DRAM no slower than 100 ns.

Eric