[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: New GS/new accelerator
On Sun, 13 Feb 2000, Delfs wrote:
> Date: Sun, 13 Feb 2000 10:50:43 -0600
> From: Delfs <delfs@NOSPAMapple2.com>
> Reply-To: delfs@apple2.com
> Newsgroups: comp.sys.apple2
> Subject: Re: New GS/new accelerator
>
> I think this is one of those it sounds simple, yet may be very difficult to
> actually do. I read the TWGS has that extra connector for hooking up to a
> memory card. Anyone know how to impliment it? We would be building a card
> with fast ram that has two access points, one for the IIgs MB slow access
> and another for TWGS fast access. One could simply latch the fast data for
> slow access at the slot...
There is?? wow. I actually hadnt thought of this before (smacking self),
but there IS always the put-it-between-the-accelerator-and-its-cpu solution.
How exactly DOES the IIGS determine how much ram it has? a power-up test?
If so, one could simply toss on some highspeed ram on this memory connector
and convince the accelerator to not slow down for ram accesses
(0:0-0:bfff;1:0-wherever) =)
-Jonas