Steven Hirsch wrote:
On 12/18/2010 10:54 AM, Steven Hirsch wrote:On 12/17/2010 11:55 AM, Mike Maginnis wrote:On Dec 16, 5:28 pm, Steven Hirsch<snhir...@gmail.com> wrote:On 12/15/2010 09:32 PM, James Littlejohn wrote:I not sure if Mike did or not but, I had a full write up on A2Central over the REV of boards and chips that were best for the acceleration.I'm pleased to say that my IIc + is a Rev A with NCR ASIC. I replaced the 16Mhz. can oscillator with a 32Mhz. part and it seems to be running fine at8Mhz. - with no other changes required. :-) Thanks again for the nice writeup! SteveMy IIc+ has the same ASIC. Sadly, my soldering skills are nonexistent, so I will have to be content with 4 MHz... But it's good to know that the upgrade *could* be done...Yes, you do want to be a bit careful when pulling the can oscillator. The real challenge is the ground pin, since it has a large plane on the top side of theboard that acts as a marvelous heatsink :-).Now, if there was a readily-available mass-storage solution for the IIc+ I'dbe all set.Speaking of nothing in particular: Both of my IIc+ units have "Type A" motherboards with NCR ASIC chips, but neither are fitted with socketed SRAM. Doesn't matter to me, since they are stable at 8Mhz. (32Mhz osc), but would make things a bit messier to refit with faster chips for 10Mhz. stability.
I'd always like to see a machine run stably a little above the frequency I regularly use, just to ensure timing margins. Unfortunately, when I made my 32MHz substitution, all my higher frequency oscillators didn't work--and a 32MHz oscillator of the same type didn't work either. Apparently, some oscillators don't work well in the //c+. It is very stable at 8/32MHz. I didn't pay attention to the board or chip versions. ;-( -michael NadaNet 3.1 for Apple II parallel computing! Home page: http://home.comcast.net/~mjmahon/ "The wastebasket is our most important design tool--and it's seriously underused."