Re: Commodore drives can be controlled on Apple II serial!

[dempson@actrix.gen.nz (David Empson)]

Ronald Austin <ronald@caprock-spur.com> wrote:

> David Empson wrote:
> >> The serial port is not electrically compatible with the 1571 drive, if
> > what I've read in these threads is accurate.  (They use TTL-level
> > signals, not RS-232.)
> 
> The 1571 drive IS TTL-level NOT RS-232.
> 
> BTW what chip does the A2 use for this I/O?

Which I/O do you mean?

The serial port varies depending on the computer and interface card.
The most prevalent standard on the slotted 8-bit machines (][, ][+, //e)
is the Super Serial Card, which uses the 6551.  This chip is also used
in the Apple //c.  The IIgs uses the Zilog Z8530 SCC, which is the same
one used by the Macintosh.

The disk port is controlled by a few discrete logic chips on the
original 5.25" drive controller card.  One of them is a bipolar ROM
which is set up with some other circuitry to form a finite state machine
(the "logic state sequencer") that controls the low-level tasks of the
disk I/O, such as shifting individual data bits in and out.  It needs
very intensive CPU support: when reading data, the software must be
ready to get the next byte within 32 CPU cycles (1 MHz per cycle,
approximately), and when writing data, the values must be presented
exactly every 32 CPU cycles (using CPU timing loops).  The other control
signals go through address decoding and latching circuitry, but are
effectively under direct CPU control.

In the Apple IIc and IIgs, the standard disk controller card has been
replaced by a single chip called the IWM (Integrated Woz Machine) that
incorporates all the disk controller circuitry and adds a few more
features, but the fundamental scheme of accessing 5.25" drives is
identical.

The IWM is able to support the "SmartPort" protocol, which is used with
intelligent drives such as the UniDisk 3.5.  Data is transferred in
packets between the computer and drive (there is a CPU and another IWM
in the drive).  Packets are either commands or data blocks.  The main
limit of this protocol is that the data rate is fixed (32 microseconds
per byte, as with 5.25" drives) and that each byte transferred must have
bit 7 set.

The IIgs also supports direct access to the Apple 3.5 Drive, which is
the non-intelligent version of the UniDisk 3.5.  This requires data to
be transferred at twice the rate of the 5.25" drive - 16 microseconds
per byte; the IIgs has to run in "fast" mode to achieve this, and the
write timing does not have to be exact because a buffer is provided by
the IWM when using the Apple 3.5 drive.

The IWM was also used in the first few Macintosh models, but the Mac
doesn't have any software to support Apple II 5.25" or SmartPort drives.
In later models, the IWM was replaced with a SWIM (Super Woz Integrated
Machine), which adds support for MFM and high density disks (one
microsecond bit cells).  Apple also provided a card for the Apple IIgs
and enhanced IIe that uses this chip.  The chip itself has never been
publically documented.

-- 
David Empson
dempson@actrix.gen.nz
Snail mail: P.O. Box 27-103, Wellington, New Zealand