Re: 6502, 65816 = RISC ?

[wbaguhn@nyx10.cs.du.edu (Will Baguhn)]

In article <3211B31A.27EC@esis.vsnet.ch>,
Gilles Tschopp  <gilles.tschopp@esis.vsnet.ch> wrote:
>Hello,
>
>I would like to thank to the people who have answered my 
>questions about the ROM04 and 65832.
>
>Now, I have a nice question. 
>
>For me, I consider the 6502 (and 65816) as RISC and not CISC. 
>The RISC is only a philosophy and not a technical way of 
>manufacturing CPU. I still have my Apple IIc and I always feel 
>that the 6502 is quicker than the 8086-4.77 (and even the 
>8086-9.54 from my old Toshiba portable), and is comparable with 
>a 286-8 or 10.

There's a reason for that.  It's not that the processor is quicker:
it's that the programming is better.  Apple was designed by hackers
trying to get every last smidgen of speed out of the inexpensive hardware
that they could; the others were designed by IBM who didn't need to
be fast.  They sold computers based on the logo, not based on what they
could actually do.

If someone designed an 8086 based computer with the same philosophy
Apple used to build the II's at 4.77 MHz, it'd be about 4.77 times
faster than the Apple II's.  As is, a bad operating system and
too much extra hardware stand in the way.

>
>Moreover, the 6502 has only five registers and can manage 
>directly the memory. So it has less opcodes to execute, compared 
>with the 8086, and can be considered as RISC.
>
>For you, can you consider the 6502 (and 65816) as RISC ? 

6502 has 3 registers, last I checked.  A,X,Y.  The PC and S aren't
really registers; they can't be used to hold or manipulate data
from code.  there's no way to load the program counter short of a
JSR, JMP, BRK, etc... which changes which part of the code is
running.  The S register can only be used nicely for Stack operation.
(there's no EOR with stack, for instance)

Is it RISC?  don't think so.  it's limited instruction set
CISC. 

>I would like to know your advice ! Thank you.
>
>Gilles Tschopp
>------------------------------------------
>Gilles Tschopp, Informaticien de gestion ES
>gilles.tschopp@esis.vsnet.ch
>http://icare.itech.ch


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