Re: ZipGS stability at 15 MHz - update

[dempson@atlantis.actrix.gen.nz (David Empson)]

In article <Pine.SOL.3.91.960709121545.14006B-100000@moose>,
Paul Schultz  <pschultz@med.wayne.edu> wrote:
>
> When I was running my ZipGS at 15MHz (unstable also) the utilities
> would display the speed at 14.93 also. I attributed it to the utility
> software and not the hardware.

I'd agree with that.  It could just be a rounding error.

The mechanism used by software to identify the speed of the ZIP is
based around a counting loop which is polling the "one millisecond"
clock signal provided in one of the ZIP registers.

Assuming the loop code is cached, interrupts are disabled, and there
is no DMA going on, then the code should be running at full speed,
except for the cycles during which the ZIP register is being polled
(and even that might be able to run at full speed, depending on exactly
how the ZIP handles I/O accesses).

The timing resolution will be limited by the speed at which the code
can increment its counter and poll the millisecond flag.

Something like this:

         longa off
         longi on
         ldy #$0000
         bra first
loop     iny
first    bit zip_flag    ; Somewhere in $C058-$C05F, with ZIP regs enabled
         bpl loop

Assuming the direct page has been moved to $C000, the loop takes 7
cycles.  A 15 MHz zip would execute this code in 466.7 ns per loop
(assuming no slow down for the I/O access), and it should count to
2142 in one millisecond.

By comparison, a 14.93 MHz ZIP would take 468.9 ns per loop, and it
should count to 2132 in one millisecond.

If the ZIP does slow down to 1 MHz for the I/O read, then the loop
would always take the same amount of time: six cycles at 15 MHz would
take 400 ns, then one cycle at 1.023 MHz would take 977.5 ns, but the
ZIP has to synchronize with the motherboard, which would use up the
rest of the extra cycle.  This would require a longer loop to allow
for a reasonable estimate of the accelerator speed, and the result
would be less accurate for higher clock speeds, because more time
(relative to the CPU clock) would be wasted waiting for the sync with
the motherboard.

This suggests to me that the ZIP does NOT slow down when its own
registers are accesed.












-- 
David Empson
dempson@actrix.gen.nz
Snail mail: P.O. Box 27-103, Wellington, New Zealand