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CV Tech RAM Card



Quote|:
Quote|: >Steve Townsend (steve.townsend@rook.wa.com) wrote:
Quote|: >: Configurations!
Quote|: >:
Quote|
Quote| Ah, Steve?  Did you get my e-mail?
    
Kirk,
    I got you letter of a few days ago, yes.  I asked some 
follow up questions, but have not had a reply.  Here is my note
again in case you never got it.
    
                        Steve
    
         
Kirk,
         
    Thanks for responding to my question about the CV
Piggy-back RAM card.  I'm afraid however, that I need a bit
more explanation.  I don't understand your notes which, after
the copy/paste correction read:
         
: :
: Total Memory          Banks to fill         Jumpers
:
: 1 Mb                  Bank1                  D+C
: 2 Mb                  Banks 1+2              D+B
: 3 Mb                  Banks 1+2+3            C+A
: 4 Mb                  Banks 1+2+3+4          C+B
: 5 Mb                  All + Slot             D+C
: 6 Mb                  All + Slot             D+B
: 7 Mb                  All + Slot             C+A
: 8 Mb                  All + Slot             C+B
    
    
    Specifically, I must ask you for your meaning when you
refer to  Jumpers A, B, C, and D.
    
    
    My board, once again, looks like this, with the jumpers
between B-C in both row 1 and in row 2 as indicated.
    
    
              ______________
             |     A  B  C  |
             |  1  .  .__.  |    (Configured for 5-Meg)
             |  2  .  .__.  |
             |______________|
    
    
    The question again, is: how do I configure these jumper
blocks to run with 4-Meg installed on the CV RAM card when the
piggy-back slot is empty?    
    Here is a blank.  Can you fill it in and send it back to
me so that I will know where to move my jumper blocks?
         
    
              ______________
             |     A  B  C  |
             |  1  .  .  .  |    (Please Configure for 4-Meg)
             |  2  .  .  .  |    (with Piggy-Back Slot Empty)
             |______________|
    
    
    
    Sorry to seem so thick headed about this, but try as I
might, I just can't translate your A+B+C+D notation into the
physical ::: row and column layout of the pins that are on the
card. 
    
                         Thanks Again,
                                          
                         Steve.Townsend@rook.wa.com       or
        
                         townsend@potlatch.esd112.wednet.edu