Re: Flame-o-Rama! (was Re: ZipGS 12MHz on

[philip@labtam.oz.au (Philip Stephens)]

>But what about register transfer instructions?  From this info, a tax or
>tay should take one cycle, as well as other register transfer instructions.

  That's what I thought originally too, but in the case of register transfer
instructions the cycle count goes like this:

  Cycle #1: Fetch the opcode
  Cycle #2: Decode the opcode
  Cycle #3: (overlapping the next opcode fetch) tranfer the data

  Compare this with the immediate instructions I gave as an example before:

  Cycle #1: Fetch the opcode
  Cycle #2: Decode the opcode while fetching the immediate operand
  Cycle #3: (overlapping the next opcode fetch) perform the operation

  Those of you who are paying attention will realise that during cycle #2
of register transfer functions there must in fact be a fetch of the next
opcode, since the processor must always do a fetch of the byte following
the current opcode during cycle #2 since it doesn't yet know what the
addressing mode will be!  So it may be that cycle #3 of the register transfer
is just the transfer itself and not a duplicate opcode fetch, but I can't
remember offhand what the true situation is.  But the effective cycle time
of the register transfer is still two cycles.

  By the way, the Lichy/Eyes book "Programming the 65816" contains a data
sheet that explains exactly what the 65816 does during each clock cycle.
This is where I've been getting my information from.  It's quite enlightening
information for people like me who used to believe that cycle times for
each addressing mode were fixed.  For instance, how many people knew that
a load using absolute indexing takes 5 cycles if a page boundary is crossed,
but only 4 otherwise?  Why?  Because the index is added to the low byte of
the memory address in one cycle, then the resulting location is read while
the carry is added to the high byte--so a second fetch must take place if
there was a carry!  So remember that when using indexing to access an I/O
location :-)
 
-- 
=========== Philip Stephens, Systems Programmer, Labtam Australia ============
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