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Re: ZipGS Tech. Question
- Subject: Re: ZipGS Tech. Question
- From: irsman@iastate.edu (Ian Schmidt)
- Date: Mon, 23 Aug 1993 15:03:22 GMT
- Newsgroups: comp.sys.apple2
- Organization: Iowa State University, Ames, IA
- References: <259do2$3f9@reeve.research.aa.wl.com>
- Sender: news@news.iastate.edu (USENET News System)
In article <259do2$3f9@reeve.research.aa.wl.com> schultp@aa.wl.com (Paul Schultz) writes:
>Could someone explain the DATA and TAG cache memory designations
>on the ZipGS card? Why did my card come with one (TAG or DATA, I
>can't remember which right now) with slower SRAM chips than the
>other? I believe the TAG had 70ns chips and the DATA had 45ns
>chips when I got it.
The TAG chip contains tracking information needed by the Zip so it knows what
data in the DATA chip corresponds to which memory address. I'm sure someone
more well educated than I can go into gory details on cache architectures.
--
Ian Schmidt |"And so it crept out of the atomic mists --the incredible
Two Meg Software | Silverware Creature. Its only goal: to destroy
irsman@iastate.edu | mankind as we know it -- spooning and forking its way to
IRSMan@aol.com | world domination" - J.M. DeMatteis, X-Factor #94.