Hi folks,
I set up a Carte Blanche today to experiment with how it performs with
a IIc, and to determine if it was a possible contender for any IIc
projects. CB plugged up quite easily using PB04, a standard 40 pin
extension cable and a killy clip over the existing 65C02 processor.
The IIc easily powered CB directly. The FPGA has full read/write
access to all 65C02 processor pins. I set up a project that simply
monitored the processor executing cycle by cycle. Mapping the FPGA
into any spare or IO address space could easily be achieved. Carte
Blanche removes itself from the IIc during bit stream loading and
reset, so the FPGA did not effect the execution of the IIC, even when
CB is not programmed.
All in all, the result was good. This setup is perfect for development
only, but would need a physical hardware version to make it
deployable. The IIc version of CB would be in a form that simply had a
killy clip and would plug onto the existing processor - all other
aspects of CB would remain the same to allow the same code to be used
on either a II or IIc.