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Re: Carte Blanche for the IIc
I agree - in fact the CBIIC PCB could easily have a footprint that
suits both the IIc and IIc plus. CB's FPGA can interface to up to 40
of either machines 5V IO, which includes 3 clock signals. The 40 pin
CPU, IOU and MMU are the most easily accessable signals available. A
40 pin killy clip makes this achievable.
The only problem is, when I have tried to get my hands on a IIc plus,
they sell for heaps. And I have a IIc here already. It's sorta swaying
to a IIc only CB if I can't get my mits on a IIc plus to develop with.
I'll keep my eyes open for one on ebay maybe.
steve
> Sounds good for a IIc, but the IIc+ runs the processor at high speed
> (4MHz stock, 8+MHz "chipped") on the other side of a cache. This might
> make the processor a less handy attachment point.
>
> (Using "though hole" "socket pins", one might piggyback the CB
> between the CPU socket and the CPU for a neater installation.)
>
> -michael
>
> ******** Note new website URL ********
>
> NadaNet and AppleCrate II for Apple II parallel computing!
> Home page: http://home.comcast.net/~mjmahon/
>
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