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Re: Carte Blanche
On Apr 4, 3:50 pm, "Michael J. Mahon" <mjma...@aol.com> wrote:
> Since the maximum transition rate is once every 4 microseconds, you
> don't need to sample that often--you just need to arrange not to
> miss a pulse. Any sub-bitcell timing variation will not be able
> to be repeatably determined by *any* Apple II code, so no protection
> scheme can depend on it either.
>
> The thing that *is* necessary, and that the EDD+ allowed, is
> determining the presence of extra zero bitcells between valid
> nibbles.
>
> The state machine samples at 2MHz because a read pulse is nominally
> only 1 microsecond wide, and 1MHz sampling might miss one. The
> higher sampling rate also allows finer grain adjustments of the
> "digital PLL" to stay in sync with bitcells.
>
> But there is still a limit of one pulse per 4 microseconds, so
> the shift rate can be kept to 250kHz--so there's plenty of time
> to load the shift register value and store it every 4 bitcells,
> even using a loop.
The problem with a sequencer that doesn't use a digital PLL is that it
will drift out of phase if the pulse detection window is wide. If it's
narrow, i.e. 2 sequencer clocks, I didn't see this happening (but the
bandwidth is a problem in this case).
I did try to design a digital PLL version which captured 7 bits
(including any leading zeroes) and used the high bit as a flag like
Woz's sequencer. The resulting data would be almost the same as the
EDD card's except 7 bits per byte, not 8. The catch is that the
leading bit has to be "remembered" while the latch data is kept stable
long enough for the BPL loop to read it. In Woz's sequencer this bit
is always one, but if it can be 0 or 1 then it must be "remembered" by
the state machine - effectively a code path for each.
Then the sequencer code needs to be longer - at least doubled, which
means an extra address bit. This could be done by repurposing an
unneeded latch register control line, and making another loopback
address bit in the sequencer command word - but of course Woz didn't
leave any clocked flip-flips free ;-) so an 8 FF chip needs to replace
the 6 FF part. This could quite possibly work, though there are still
other compilcations, and it was no longer the one-chip mod I had hoped
for.
Your idea of a read resetting the sequencer is an interesting possible
solution. But now I have a daughter and a worldwide recession to deal
with. ;-)
Cheers,
Nick.