I have started the project by trying to emulate it in the
part of an FPGA while the other part pretends to be an Apple 2.
So far I got mixed results. Simple test that writes a few bytes
to the "applicard" seems to work fine, but CP/M doesn't boot.
In fact it loads most of the system into the top of the z80 memory.
Strings are recognizable as CP/M. The z80 CPU loops in a downloaded
code polling for commands from the 6502 while the 6502 waits for
stuff from the z80. Tough to figure out what's going on without
knowing the code. Steven promised to send some my way, so there
is a hope.
Meanwhile I looked at the schematics and found one unusual thing.
IOSEL signal is wired to read the data byte from the z80 side, but
NOT reset the flag. This doesn't seem to be documented. Wonder
if the code uses this? Sure I can duplicate this in my logic, but
how many other undocumented features are there?
I was emulating the documented behavior, not the actual implementation.
Any bits of knowledge you may have are appreciated.
-Alex.