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Re: NadaNet for the //c - just an idea



BLuRry wrote:
What about the serial port?  Can you just use the DSR (pin 5) for
input and DTR (pin 1) for output?
I wouldn't know if they were configurable at that level - I've always
been a well-behaved programmer and used the firmware interfaces,
despite their reputation for being awful
They are, actually. At least to some extent.
But that requires more CPU cycles than the disk port, since the signal is
not available at bit 7 (it is in bit 6) and sending requires not just
banging a softswitch, but writing to a register.

Well...  Sort of.  At least setting DTR off is easy:

STZ $C09A, takes 4 cycles.  A steal of a deal.

You'd have to store #$01 into C09A to turn DTR on.   LDA #$01 STA
$c09a is just as effective, but takes two cycles longer than STZ does.

Reading isn't all that bad, LDA $C099 and AND #$40, or rotate bits to
test with the negative flag -- but either way this take 6 cycles to
do.

So, there's a lot of things that would take 6 cycles, and another 2/3
for a branch -- is this too slow for nada net?

For receiving, if the state can be put into the carry flag in
6 cycles, then that could work.  Right off hand, I don't see an
easy way to do that if the high bit is indeterminate.  And the
overflow flag cannot be disturbed...

For sending, anything over 4 cycles won't work, so receiving is
probably moot.  (Oh, and 65C02 instructions are illegal.  ;-)

-michael

AppleCrate II: An Apple II "blade server"!
Home page:  http://members.aol.com/MJMahon/

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